| Compute caches S Aga, S Jeloka, A Subramaniyan, S Narayanasamy, D Blaauw, R Das 2017 IEEE International Symposium on High Performance Computer Architecture …, 2017 | 259 | 2017 |
| Invisimem: Smart memory defenses for memory bus side channel S Aga, S Narayanasamy ACM SIGARCH Computer Architecture News 45 (2), 94-106, 2017 | 65 | 2017 |
| Efficiently enforcing strong memory ordering in GPUs A Singh, S Aga, S Narayanasamy Proceedings of the 48th International Symposium on Microarchitecture, 699-712, 2015 | 22 | 2015 |
| MOCA: Memory object classification and allocation in heterogeneous memory systems A Narayan, T Zhang, S Aga, S Narayanasamy, A Coskun 2018 IEEE International Parallel and Distributed Processing Symposium (IPDPS …, 2018 | 21 | 2018 |
| Co-ML: a case for Collaborative ML acceleration using near-data processing S Aga, N Jayasena, M Ignatowski Proceedings of the International Symposium on Memory Systems, 506-517, 2019 | 14 | 2019 |
| InvisiPage: Oblivious demand paging for secure enclaves S Aga, S Narayanasamy Proceedings of the 46th International Symposium on Computer Architecture …, 2019 | 14 | 2019 |
| Seqpoint: Identifying representative iterations of sequence-based neural networks S Pati, S Aga, MD Sinclair, N Jayasena 2020 IEEE International Symposium on Performance Analysis of Systems and …, 2020 | 8 | 2020 |
| Invisimem: Smart memory for trusted computing S Aga, S Narayanasamy International Symposium on Computer Architecture 10 (3079856.3080232), 2017 | 7 | 2017 |
| zfence: Data-less coherence for efficient fences S Aga, A Singh, S Narayanasamy Proceedings of the 29th ACM on International Conference on Supercomputing …, 2015 | 6 | 2015 |
| Trusted computing system with enhanced memory S Narayanasamy, AGA Shaizeen US Patent 10,496,552, 2019 | 5 | 2019 |
| Ordering constraint management within coherent memory systems AGA Shaizeen, A Singh, S Narayanasamy US Patent 9,367,461, 2016 | 3 | 2016 |
| CilkSpec: optimistic concurrency for Cilk S Aga, S Krishnamoorthy, S Narayanasamy Proceedings of the International Conference for High Performance Computing …, 2015 | 3 | 2015 |
| Demystifying BERT: Implications for Accelerator Design S Pati, S Aga, N Jayasena, MD Sinclair arXiv preprint arXiv:2104.08335, 2021 | 2 | 2021 |
| Efficient Cache Utilization via Model-aware Data Placement for Recommendation Models MA Ibrahim, O Kayiran, S Aga The International Symposium on Memory Systems, 1-11, 2021 | 1 | 2021 |
| Device and method for accelerating matrix multiply operations AGA Shaizeen, N Jayasena, AH Rush, M Ignatowski US Patent 10,956,536, 2021 | 1 | 2021 |
| APPROACH FOR REDUCING SIDE EFFECTS OF COMPUTATION OFFLOAD TO MEMORY S Aga, N Jayasena US Patent App. 17/364,854, 2023 | | 2023 |
| Dynamically coalescing atomic memory operations for memory-local computing J Alsop, A Dutu, AGA Shaizeen, N Jayasena US Patent App. 17/361,145, 2022 | | 2022 |
| Demystifying BERT: System Design Implications S Pati, S Aga, N Jayasena, MD Sinclair 2022 IEEE International Symposium on Workload Characterization (IISWC), 296-309, 2022 | | 2022 |
| Hardware-software collaborative address mapping scheme for efficient processing-in-memory systems M Islam, AGA Shaizeen, N Jayasena, JB Kotra US Patent 11,487,447, 2022 | | 2022 |
| Detecting execution hazards in offloaded operations J Alsop, AGA Shaizeen US Patent App. 17/536,817, 2022 | | 2022 |
Satish NarayanasamyUniversity of MichiganVerified email at umich.edu
