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Kamaraj Arunachalam
Kamaraj Arunachalam
Associate Professor, Department of ECE, Mepco Schlenk Engineering College, Sivakasi
Verified email at mepcoeng.ac.in
Title
Cited by
Cited by
Year
Design of integrated reversible fault-tolerant arithmetic and logic unit
A Kamaraj, P Marichamy
Microprocessors and Microsystems 69 (2), 16-23, 2019
262019
Design and implementation of arithmetic and logic unit (ALU) using novel reversible gates in quantum cellular automata
A Kamaraj, P Marichamy
2017 4th International Conference on Advanced Computing and Communication …, 2017
202017
Design of router using reversible logic in quantum cellular automata
A Kamaraj, S Ramya
2014 International Conference on Communication and Network Technologies 2 (1 …, 2014
182014
Design of fault-tolerant reversible floating point division
A Kamaraj, P Marichamy
Informacije MIDEM 48 (3), 161-172, 2018
112018
Intelligent transport system using integrated GPS optimized reader
A Kamaraj, K Radha, M Priyanka, M Punitha
2016 Second International Conference on Science Technology Engineering and …, 2016
112016
Design and implementation of adders using novel reversible gates in quantum cellular automata
A Kamaraj, P Marichamy, SK Devi, M Nagalakshmisubraja
Indian Journal of Science and Technology 9 (8), 1-7, 2017
82017
Pipelined FIR Filter Implementation using FPGA
JS A.Kamaraj, C.Kalyana Sundaram
International Journal of Scientific Engineering and Technology 1 (4), 55-60, 2012
82012
A comprehensive review on accuracy in ultrasonic flow measurement using reconfigurable systems and deep learning approaches
JS Kumar J, A Kamaraj, CK Sundaram, G Shobana, G Kirubakaran
AIP Advances 10 (10), 105221-1 to 105221-15, 2020
72020
Design of fault-tolerant reversible Vedic multiplier in quantum cellular automata
A Kamaraj, P Marichamy
NSF: Colombo, 2019
72019
DESIGN AND IMPLEMENTATION OF A REVERSIBLE LOGIC BASED 8-BIT ARITHMETIC AND LOGIC UNIT
CKSJSK Kamaraj Arunachalam, Marichamy Perumalsamy
International Journal of Computers and Applications 36 (2), 49-55, 2014
72014
Design of Space-Efficient Nano Router in Reversible Logic with Multilayer Architecture
A Kamaraj, P Marichamy, J Senthil Kumar, S Selva Nidhyananthan, ...
Design and Testing of Reversible Logic 1, 233-250, 2020
62020
Design of combinational logic circuits for low power reversible logic circuits in quantum cellular automata
IV Anand, A Kamaraj
International Conference on Information Communication and Embedded Systems …, 2014
62014
Design of low power combinational circuits using reversible logic and realization in quantum cellular automata
A Kamaraj, IV Anand, P Marichamy
International Journal of Innovative Research in Science, Engineering and …, 2014
62014
Programmable implementation of time-area- efficient Elliptic Curve Cryptography for entity authentication
A Kamaraj, P Marichamy
Informacije MIDEM 52 (2), 89-103, 2022
5*2022
Implementation of wheelchair controller using eyeball movement for paralytic people
A Kamaraj, PS Tulasiram, JJ Vasanth
Dept. of ECE, Mepco Schlenk Engineering College, Tamil Nadu, IJESRT 2 (4), 1-3, 2013
52013
Multi-Port Memory Design in Quantum Cellular Automata Using Logical Crossing
A Kamaraj, P Marichamy, R Abirami
Informacije MIDEM 51 (1), 49-61, 2021
4*2021
Review of Statistical Analysis and Effects of Meditation on Mental Health and Cognitive Skill Development
A Kamaraj, JS Kumar, CK Sundaram
Indian Journal of Public Health Research & Development, 11 (6), 22-29, 2020
42020
Effects of Heartfulness Meditation Practices on Control of Alz-heimer’s Disease: A Comprehensive Review
A Kamaraj, C Kalyana Sundaram
Iranian Journal of Public Health 50 (12), 2427-2438, 2021
32021
FAULT TOLERANCE IN REVERSIBLE LOGIC CIRCUITS AND QUANTUM COST OPTIMIZATION
A Kamaraj, P Marichamy, KP Kaviyashri
Computing and Informatics, 39 (5), 1099-1116, 2021
3*2021
Fault Tolerance in Reversible Logic Circuits and Quantum Cost Optimization
A Kamaraj, P Marichamy, KP Kaviyashri
Computing and Informatics 39 (5), 1099-1116, 2020
32020
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