Follow
Francois Botman
Francois Botman
ICTEAM, EPL, Université catholique de Louvain
Verified email at ieee.org
Title
Cited by
Cited by
Year
SleepWalker: A 25-MHz 0.4-V Sub- 7- Microcontroller in 65-nm LP/GP CMOS for Low-Carbon Wireless Sensor Nodes
D Bol, J De Vos, C Hocquet, F Botman, F Durvaux, S Boyd, D Flandre, ...
IEEE Journal of Solid-State Circuits 48 (1), 20-32, 2012
1802012
Green SoCs for a sustainable Internet-of-Things
D Bol, J De Vos, F Botman, G de Streel, S Bernard, D Flandre, JD Legat
2013 IEEE Faible Tension Faible Consommation, 1-4, 2013
682013
A 25MHz 7μW/MHz ultra-low-voltage microcontroller SoC in 65nm LP/GP CMOS for low-carbon wireless sensor nodes
D Bol, J De Vos, C Hocquet, F Botman, F Durvaux, S Boyd, D Flandre, ...
ISSCC, 2012
562012
Bellevue: A 50MHz variable-width SIMD 32bit microcontroller at 0.37 V for processing-intensive wireless sensor nodes
F Botman, J De Vos, S Bernard, F Stas, JD Legat, D Bol
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 1207-1210, 2014
412014
A 65 nm 0.5 V DPS CMOS image sensor with 17 pJ/frame. pixel and 42 dB dynamic range for ultra-low-power SoCs
N Couniot, G de Streel, F Botman, AK Lusala, D Flandre, D Bol
IEEE Journal of Solid-State Circuits 50 (10), 2419-2430, 2015
402015
A 65-nm 0.5-V 17-pJ/frame. pixel DPS CMOS image sensor for ultra-low-power SoCs achieving 40-dB dynamic range
D Bol, G de Streel, F Botman, AK Lusala, N Couniot
2014 Symposium on VLSI Circuits Digest of Technical Papers, 1-2, 2014
272014
Data-dependent operation speed-up through automatically inserted signal transition detectors for ultralow voltage logic circuits
F Botman, D Bol, JD Legat, K Roy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (12 …, 2014
52014
Branch instruction
TC Grocutt, RR Grisenthwaite, SJ Craske, FCJ Botman, BJ Smith
US Patent 10,768,938, 2020
32020
Capability write address tracking
ML Boettcher, FCJ Botman
US Patent 11,609,863, 2023
12023
Binary search procedure for control table stored in memory system
TC Grocutt, FCJ Botman
US Patent 11,907,301, 2024
2024
Masked-vector-comparison instruction
J Eapen, ML Boettcher, V Balaji, FCJ Botman
US Patent App. 18/247,595, 2024
2024
Technique for constraining access to memory using capabilities
FCJ Botman, TC Grocutt, BJ Smith
US Patent App. 18/247,400, 2023
2023
Apparatus and method for managing capabilities
FCJ Botman, TC Grocutt, HJM Vincent, CA Reed
US Patent App. 17/726,065, 2023
2023
Filtering based on a range specifier
FCJ Botman, TC Grocutt, BJ Smith
US Patent 11,720,619, 2023
2023
Vector generating instruction for generating a vector comprising a sequence of elements that wraps as required
FCJ Botman, TC Grocutt, N Burgess
US Patent 11,714,641, 2023
2023
Marking current context data to control a context-data-dependent processing operation to save current or default context data to a data location
TC Grocutt, FCJ Botman, BJ Smith
US Patent 11,704,127, 2023
2023
Control of branch prediction for zero-overhead loop
TC Grocutt, FCJ Botman
US Patent 11,663,007, 2023
2023
Apparatus and method for capability-based processing
BJ Smith, TC Grocutt, FCJ Botman
US Patent App. 17/759,973, 2023
2023
Apparatus and method for generating and processing a trace stream indicative of instruction execution by processing circuitry
FCJ Botman, TC Grocutt, JM Horley, MJ Williams, MJ Gibbs
US Patent 11,561,882, 2023
2023
Region mismatch prediction for memory access control circuitry
FCJ Botman, TC Grocutt, JWD Andrew
US Patent 11,550,735, 2023
2023
The system can't perform the operation now. Try again later.
Articles 1–20