| DNNExplorer: a framework for modeling and exploring a novel paradigm of FPGA-based DNN accelerator X Zhang, H Ye, J Wang, Y Lin, J Xiong, W Hwu, D Chen Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020 | 75 | 2020 |
| HybridDNN: A framework for high-performance hybrid DNN accelerator design and implementation H Ye, X Zhang, Z Huang, G Chen, D Chen 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 70 | 2020 |
| Scalehls: A new scalable high-level synthesis framework on multi-level intermediate representation H Ye, C Hao, J Cheng, H Jeong, J Huang, S Neuendorffer, D Chen 2022 IEEE International Symposium on High-Performance Computer Architecture …, 2022 | 64 | 2022 |
| CHARM: Composing Heterogeneous AcceleRators for Matrix Multiply on Versal ACAP Architecture J Zhuang, J Lau, H Ye, Z Yang, Y Du, J Lo, K Denolf, S Neuendorffer, ... Proceedings of the 2023 ACM/SIGDA International Symposium on Field …, 2023 | 20 | 2023 |
| ScaleHLS: a scalable high-level synthesis framework with multi-level transformations and optimizations H Ye, HG Jun, H Jeong, S Neuendorffer, D Chen Proceedings of the 59th ACM/IEEE Design Automation Conference, 1355-1358, 2022 | 11 | 2022 |
| Autoscaledse: A scalable design space exploration engine for high-level synthesis HG Jun, H Ye, H Jeong, D Chen ACM Transactions on Reconfigurable Technology and Systems 16 (3), 1-30, 2023 | 8 | 2023 |
| ScaleHLS: Achieving scalable high-level synthesis through MLIR H Ye, C Hao, H Jeong, J Huang, D Chen Proceedings of the Workshop on Languages, Tools, and Techniques for …, 2021 | 8 | 2021 |
| Being-ahead: Benchmarking and exploring accelerators for hardware-efficient AI deployment X Zhang, H Ye, D Chen arXiv preprint arXiv:2104.02251, 2021 | 5 | 2021 |
| High-level synthesis for domain specific computing H Ye, H Jun, J Yang, D Chen Proceedings of the 2023 International Symposium on Physical Design, 211-219, 2023 | 4 | 2023 |
| IDLA: An instruction-based adaptive CNN accelerator P Gao, Z Huang, H Ye, G Chen 2020 IEEE 15th International Conference on Solid-State & Integrated Circuit …, 2020 | 4 | 2020 |
| A Resource-Sharing & Pipelined Design Scheme for Dynamic Deployment of CNNs on FPGAs HC Ye, GS Chen 2018 14th IEEE International Conference on Solid-State and Integrated …, 2018 | 1 | 2018 |
| Software/Hardware Co-design for LLM and Its Application for Design Verification LJ Wan, Y Huang, Y Li, H Ye, J Wang, X Zhang, D Chen 2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC), 435-441, 2024 | | 2024 |
| Subgraph Extraction-based Feedback-guided Iterative Scheduling for HLS H Ye, DZ Pan, C Leary, D Chen, X Xu arXiv preprint arXiv:2401.12343, 2024 | | 2024 |
| HIDA: A Hierarchical Dataflow Compiler for High-Level Synthesis H Ye, H Jun, D Chen arXiv preprint arXiv:2311.03379, 2023 | | 2023 |
| ScaleFlow: High-Level Synthesis for Large Dataflow Applications H Ye, D Chen | | |
| Nghonda, Erman Nikolić, Stefan Pan, Junhao Papaphilippou, Philippos Patel, Rushi S Bandara, D Barton, J Benko, J Blanuša, F Carloni, Y Chen, J Cheng, ... | | |
Deming ChenAbel Bliss Professor. University of Illinois at Urbana-ChampaignVerified email at illinois.edu
