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Gadi Haber
Gadi Haber
Software Architect at Intel Development Center and External Lecturer at the Technion in Haifa Israel
Verified email at intel.com - Homepage
Title
Cited by
Cited by
Year
Binary translation in asymmetric multiprocessor system
K Yamada, R Ronen, W Li, B Ginzburg, G Haber, K Levit-Gurevich, ...
US Patent App. 13/993,042, 2014
272014
Complementing missing and inaccurate profiling using a minimum cost circulation algorithm
R Levin, I Newman, G Haber
International Conference on High-Performance Embedded Architectures and …, 2008
252008
Optimization opportunities created by global data reordering
G Haber, M Klausner, V Eisenberg, B Mendelson, M Gurevich
International Symposium on Code Generation and Optimization, 2003. CGO 2003 …, 2003
222003
Feedback based post-link optimization for large subsystems
EA Henis, G Haber, M Klausner, A Warshavsky
Second Workshop on Feedback Directed Optimization, 13-20, 1999
211999
Parallel solutions of simple indexed recurrence equations
Y Ben-Asher, G Haber
IEEE Transactions on Parallel and Distributed Systems 12 (1), 22-37, 2001
192001
Core switching acceleration in asymmetric multiprocessor system
K Yamada, B Ginzburg, W Li, R Ronen, E Natanzon, K Levit-Gurevich, ...
US Patent 9,348,594, 2016
182016
Method and apparatus for performance efficient ISA virtualization using dynamic partial binary translation
G Haber, KK Levit-Gurevich, E Natanzon, B Ginzburg, A Elhanan, ...
US Patent 9,141,361, 2015
182015
Reliable post-link optimizations based on partial information
G Haber, EA Henis, V Eisenberg
Proceedings of the 3rd Workshop on Feedback Directed and Dynamic Optimizations, 2000
162000
Parallelization hints via code skeletonization
C Aguston, YB Asher, G Haber
IEEE Transactions on Parallel and Distributed Systems 26 (11), 3099-3107, 2014
92014
Aggressive function inlining with global code reordering
O Boehm, D Citron, G Haber, M Klausner, R Levin
IBM Technical Paper, 2006
92006
Reducing program image size by extracting frozen code and data
D Citron, G Haber, R Levin
Proceedings of the 4th ACM international conference on Embedded software …, 2004
82004
On the usage of simulators to detect inefficiency of parallel programs caused by “bad” schedulings: The Simparc approach
Y Ben-Asher, G Haber
Journal of Systems and Software 33 (3), 313-327, 1996
81996
Branch Predictor with Branch Resolution Code Injection
L Peled, G Haber, Y Sazeides
US Patent App. 15/385,011, 2018
72018
Refactoring techniques for aggressive object inlining in Java applications
Y Ben Asher, T Gal, G Haber, M Zalmanovici
Automated Software Engineering 19 (1), 97-136, 2012
72012
Aggressive function inlining: preventing loop blockings in the instruction cache
Y Ben Asher, O Boehm, D Citron, G Haber, M Klausner, R Levin, ...
International Conference on High-Performance Embedded Architectures and …, 2008
52008
Efficient parallel solutions of linear algebraic circuits
Y Ben-Asher, G Haber
Journal of Parallel and Distributed Computing 64 (1), 163-172, 2004
52004
Method and storage medium for building very large executable programs
J Civlin, G Haber, B Mendelson, D Bernstein, I Nahshon
US Patent 6,145,125, 2000
32000
Parallel solutions of indexed recurrence equations
Y Ben-Asher, G Haber
Proceedings 11th International Parallel Processing Symposium, 413-417, 1997
31997
A study of conflicting pairs of compiler optimizations
YB Asher, G Haber, E Stein
2017 IEEE 11th International Symposium on Embedded Multicore/Many-core …, 2017
22017
Code alignment for architectures with pipeline group dispatching
O Boehm, G Haber, H Kosachevsky
Proceedings of the 3rd Annual Haifa Experimental Systems Conference, 1-7, 2010
22010
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