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Anand Haridass
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Cited by
Year
Self-healing chip-to-chip interface
WD Becker, DM Dreps, FD Ferraiolo, A Haridass, RJ Reese
US Patent 7,362,697, 2008
992008
An advanced multichip module (MCM) for high-performance UNIX servers
JU Knickerbocker, FL Pompeo, AF Tai, DL Thomas, RD Weekly, ...
IBM Journal of Research and Development 46 (6), 779-804, 2002
622002
Programmable driver delay
WD Becker, A Haridass, BG Truong
US Patent 7,233,170, 2007
292007
Power grid structure to optimize performance of a multiple core processor
J Audet, LB Capps Jr, GG Daves, A Haridass, RE Newhart, MJ Shapiro
US Patent 7,420,378, 2008
262008
Parameter extraction and electrical characterization of high density connector using time domain measurements
S Pannala, A Haridass, M Swaminathan
IEEE transactions on advanced packaging 22 (1), 32-39, 1999
251999
Including dispersive dielectrics in PEEC models
G Antonini, AE Ruehli, A Haridass
Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710), 349-352, 2003
222003
Characterization and validation of processor links
RW Berry Jr, A Haridass, P Jayaraman
US Patent 8,826,092, 2014
182014
Statistical switched capacitor droop sensor for application in power distribution noise mitigation
A Haridass, CB O'reilly, RD Weekly
US Patent 7,818,599, 2010
182010
Uniform power density across processor cores at burn-in
LB Capps Jr, A Haridass, RE Newhart, MJ Shapiro
US Patent 7,389,195, 2008
182008
Method and System for Using Multiple-Core Integrated Circuits
LB Capps, TJ Dewkett, J Ferris, A Haridass, RE Newhart, MJ Shapiro
US Patent App. 11/466,903, 2008
182008
System and method for noise reduction in multi-layer ceramic packages
S Chun, JL Frankel, A Haridass, E Klink, BL Singletary
US Patent 7,348,667, 2008
182008
System and method for noise reduction in multi-layer ceramic packages
S Chun, JL Frankel, A Haridass, E Klink, BL Singletary
US Patent 7,348,667, 2008
182008
System and method to optimize multi-core microprocessor performance using voltage offsets
LB Capps Jr, WD Dyckman, J Ferris, A Haridass, JD Jordan, RE Newhart, ...
US Patent 7,721,119, 2010
172010
System and method for automatic insertion of on-chip decoupling capacitors
A Haridass, A Huber, E Klink, J Supper
US Patent 7,302,664, 2007
172007
Method for detecting noise events in systems with time variable operating points
D Douriet, A Haridass, A Huber, CB O'reilly, BG Truong, RD Weekly
US Patent 7,467,050, 2008
162008
Application and thermal-reliability-aware reinforcement learning based multi-core power management
SMP Dinakarrao, A Joseph, A Haridass, M Shafique, J Henkel, ...
ACM Journal on Emerging Technologies in Computing Systems (JETC) 15 (4), 1-19, 2019
152019
Multi-layer circuit substrate and method having improved transmission line integrity and increased routing density
S Chun, A Haridass, RD Weekly
US Patent 7,646,082, 2010
152010
Mitigate power supply noise response by throttling execution units based upon voltage sensing
D Douriet, A Haridass, A Huber, CB O'reilly, BG Truong, RD Weekly
US Patent 7,607,028, 2009
152009
Circuit for generating a tracking reference voltage
DM Dreps, A Haridass, BG Truong
US Patent 7,208,972, 2007
152007
Thevenins receiver
DM Dreps, FD Ferraiolo, A Haridass, BGH Truong
US Patent 6,930,507, 2005
152005
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