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Mohamed Saber
Mohamed Saber
Associate Professor, Dep. of Electronics & Comm. Engineering, faculty of Engineering, Delta
Verified email at deltauniv.edu.eg
Title
Cited by
Cited by
Year
MbGWO-SFS: Modified binary grey wolf optimizer based on stochastic fractal search for feature selection
ESM El-Kenawy, MM Eid, M Saber, A Ibrahim
IEEE Access 8, 107635-107649, 2020
1122020
Design and implementation of accurate frequency estimator depend on deep learning
EMEK Mohamed Saber
International Journal of Engineering and Technology(UAE) 9 (2), 367-377, 2020
36*2020
A Proposed Routing Protocol for Mobile Ad Hoc Networks
R Arnous, E El-kenawy, M Saber
Int. J. Comput. Appl 975, 8887, 2019
352019
An Integrated Framework to Ensure Information Security Over the Internet
MSRA El-Sayed Towfek M El-kenawy
International Journal of Computer Applications 178 (29), 13-15, 2019
34*2019
Low power and high-speed FPGA implementation for 4D memristor chaotic system for image encryption
SM Hagras Esam AA
Multimedia tools and Applications 79, 23203-23222, 2020
212020
Low power pseudo-random number generator based on lemniscate chaotic map
MME Mohamed Saber
International Journal of Electrical and Computer Engineering (IJECE) 11 (1 …, 2021
18*2021
A low-power implementation of arctangent function for communication applications using FPGA
Y M. Saber, Jitsumatsu, T Kohda
Signal Design and its Applications in Communications, 2009. IWSDA'09. Fourth …, 2009
17*2009
Design and implementation of low power digital phase-locked loop
M Saber, Y Jitsumatsu, MTA Khan
2010 International Symposium On Information Theory & Its Applications, 928-933, 2010
122010
Transfer Learning for Chest X-rays Diagnosis Using Dipper Throated Algorithm
DSK Hussah Nasser AlEisa, El-Sayed M. El-kenawy, Amel Ali Alhussan, Mohamed ...
CMC-Computers, Materials & Continua 73 (2), 2371–2387, 2022
9*2022
A simple design to mitigate problems of conventional digital phase locked loop
M Saber, Y Jitsumatsu, MTA Khan
Signal Processing: An international journal (SPIJ) 6 (2), 65-77, 2012
92012
Parallel multi-layer selector S-Box based on lorenz chaotic system with FPGA implementation
EH Mohamed Saber
Indonesian Journal of Electrical Engineering and Computer Science 19 (2 …, 2020
62020
A novel design and implementation of FBMC transceiver for low power applications
M Saber
Indonesian Journal of Electrical Engineering and Informatics (IJEEI) 8 (1 …, 2020
62020
Quadrature direct digital frequency synthesizer using FPGA
M saber Saber, M Elmasry, M eldin Abo-Elsoud
2006 International Conference on Computer Engineering and Systems, 14-18, 2006
62006
Frequency and power estimator for digital receivers in Doppler shift environments
M Saber, MTA Khan, Y Jitsumatsu
Signal Processing: An International Journal (SPIJ) 5 (5), 185, 2011
52011
Low noise-low power digital phase-locked loop
M Saber, Y Jitsumatsu, MTA Khan
TENCON 2010-2010 IEEE Region 10 Conference, 1324-1329, 2010
52010
Classification of Monkeypox Images Based on Transfer Learning and the Al-Biruni Earth Radius Optimization Algorithm
AA Abdelhamid, ESM El-Kenawy, N Khodadadi, S Mirjalili, DS Khafaga, ...
Mathematics 10 (19), 3614, 2022
42022
Low Power Implementation of FBMC Transceiver for 5G Wireless Networks
MEN M. Saber, A. Nader
The International Conference on Internet of Things, Embedded Systems and …, 2018
42018
On the Multiple Access Technique for 5G Wireless Networks
MEN M.Saber, A. Nader
International Journal of Scientific & Engineering Research 9 (9), 1137-1144, 2018
42018
Efficient phase recovery system
M saber
Indonesian Journal of Electrical Engimeering and Computer Science 5 (1), 123-129, 2017
42017
Design and Implementation of Low Ripple Low Power Digital Phase-Locked Loop
M Saber, Y Jitsumatsu, MTA Khan
Signal Processing: An international journal 4 (6), 304, 2011
42011
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Articles 1–20