Semi-custom NCL design with commercial EDA frameworks: Is it possible? M Moreira, A Neutzling, M Martins, A Reis, R Ribas, N Calazans 2014 20th IEEE International Symposium on Asynchronous Circuits and Systems …, 2014 | 33 | 2014 |
Synthesis of threshold logic gates to nanoelectronics A Neutzling, MGA Martins, RP Ribas, AI Reis 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2013 | 24 | 2013 |
Effective logic synthesis for threshold logic circuit design A Neutzling, JM Matos, A Mishchenko, A Reis, RP Ribas IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 22 | 2018 |
Threshold logic synthesis based on cut pruning A Neutzling, JM Matos, AI Reis, RP Ribas, A Mishchenko 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 494-499, 2015 | 22 | 2015 |
A simple and effective heuristic method for threshold logic identification A Neutzling, MGA Martins, V Callegaro, AI Reis, RP Ribas IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 21 | 2017 |
maj- Logic Synthesis for Emerging Technology A Neutzling, FS Marranghello, JM Matos, A Reis, RP Ribas IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019 | 15 | 2019 |
A constructive approach for threshold logic circuit synthesis A Neutzling, MGA Martins, RP Ribas, AI Reis 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 385-388, 2014 | 10 | 2014 |
Dataset for: effective logic synthesis flow for threshold logic circuit design A Neutzling, JM Matos, A Mishchenko, AI Reis, RP Ribas Mendeley Data, v1, 2017 | 5 | 2017 |
A benchmark suite to jointly consider logic synthesis and physical design JM Matos, A Neutzling, RP Ribas, A Reis Proceedings of the 2015 Symposium on International Symposium on Physical …, 2015 | 5 | 2015 |
An efficient method to threshold logic functions identification A Neutzling, M Martins, RP Ribas, AI Reis SOUTH SYMP. ON MICROELECTRONICS, 2013 | 3 | 2013 |
Full Adders Architectures Evaluation for 32nm Technology A Silva, C Meinhardt, PF Butzen XXVII SIM–South Symposium on Microelectronics, 0 | 3 | |
Logic synthesis for emerging technologies A Neutzling, RP Ribas Journal of Integrated Circuits and Systems 16 (1), 1-9, 2021 | 1 | 2021 |
Binary adder circuit design using emerging MIGFET devices JJ Baqueta, FS Marranghello, VN Possani, A Neutzling, AI Reis, RP Ribas 2017 18th International Symposium on Quality Electronic Design (ISQED), 125-130, 2017 | 1 | 2017 |
An isop-based method for threshold logic identification A Neutzling, MGA Martins, RP Ribas, AI Reis PROCEEDINGS OF IWLS. LOGIC & SYNTHESIS, 23TH INTERNATIONAL WORKSHOP ON …, 2014 | 1 | 2014 |
Threshold Logic Synthesis Using Functional Composition Paradigm A Neutzling, MGA Martins, RP Ribas, AI Reis Proc. of IWLS, 2013 | 1 | 2013 |
Thereshold logic technology mapping for emerging nanotechnologies A Neutzling | | 2017 |
From And-Inverter Graphs to Majority-Inverter Graphs FL Machado, VN Possani, AS Neutzling, RP Ribas, AI Reis | | |
Full Adder Cells Evaluation for Subthreshold Operation on 32nm CMOS Technology A Neutzling, C Meinhardt, PF Butzen | | |
Avaliação de circuitos somadores focando baixo consumo de potência AN Silva, R Grande | | |