Chih-Cheng Chang
Cited by
Cited by
3D Ta/TaOx/TiO2/Ti synaptic array and linearity tuning of weight update for hardware neural network applications
IT Wang, CC Chang, LW Chiu, T Chou, TH Hou
Nanotechnology 27 (36), 365204, 2016
Mitigating asymmetric nonlinear weight update effects in hardware neural network based on analog resistive synapse
CC Chang, PC Chen, T Chou, IT Wang, B Hudec, CC Chang, CM Tsai, ...
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 8 (1 …, 2017
Challenges and opportunities toward online training acceleration using RRAM-based hardware neural network
CC Chang, JC Liu, YL Shen, T Chou, PC Chen, IT Wang, CC Su, MH Wu, ...
2017 IEEE International Electron Devices Meeting (IEDM), 11.6. 1-11.6. 4, 2017
Crossbar array of selector-less TaOx/TiO2 bilayer RRAM
CT Chou, B Hudec, CW Hsu, WL Lai, CC Chang, TH Hou
Microelectronics Reliability 55 (11), 2220-2223, 2015
Sub-nA low-current HZO ferroelectric tunnel junction for high-performance and accurate deep learning acceleration
TY Wu, HH Huang, YH Chu, CC Chang, MH Wu, CH Hsu, CT Wu, MC Wu, ...
2019 IEEE International Electron Devices Meeting (IEDM), 6.3. 1-6.3. 4, 2019
NV-BNN: An accurate deep convolutional neural network based on binary STT-MRAM for adaptive AI edge
CC Chang, MH Wu, JW Lin, CH Li, V Parmar, HY Lee, JH Wei, SS Sheu, ...
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
Extremely compact integrate-and-fire STT-MRAM neuron: a pathway toward all-spin artificial deep neural network
MH Wu, MC Hong, CC Chang, P Sahu, JH Wei, HY Lee, SS Shcu, ...
2019 Symposium on VLSI Technology, T34-T35, 2019
Neural network processing system
TH Hou, CC Chang, JC Liu
US Patent 10,902,317, 2021
Strong read and write interference induced by breakdown failure in crossbar arrays
CC Chang, HH Huang, B Hudec, MH Wu, CC Chang, PT Liu, TH Hou
IEEE Transactions on Electron Devices 67 (12), 5497-5504, 2020
Two-dimensional materials for artificial synapses: toward a practical application
IT Wang, CC Chang, YY Chen, YS Su, TH Hou
Neuromorphic Computing and Engineering 2 (1), 012003, 2022
Device quantization policy in variation-aware in-memory computing design
CC Chang, ST Li, TL Pan, CM Tsai, IT Wang, TS Chang, TH Hou
Scientific reports 12 (1), 112, 2022
Development of three-dimensional synaptic device and neuromorphic computing hardware
IT Wang, T Chou, LW Chiu, CC Chang, TH Hou
2016 13th IEEE International Conference on Solid-State and Integrated …, 2016
Memory-based device
TH Hou, CC Chang
US Patent App. 17/875,262, 2022
Device and method for operating the same
TH Hou, CC Chang
US Patent 11,494,619, 2022
Strategy of Mitigating Breakdown Interference and Yield Loss in Crossbar Memory
CC Chang, IT Wang, HH Huang, B Hudec, MH Wu, CC Chang, PT Liu, ...
IEEE Transactions on Electron Devices 68 (12), 6082-6086, 2021
Device Quantization Policy and Power-Performance-Area Co-Optimization Strategy in Variation-Aware In-memory Computing Design
CC Chang, ST Li, TL Pan, CM Tsai, IT Wang, TS Chang, TH Hou
Self-Rectifying Ta/TaOx/TiO2/Ti Cell for High-Density Flexible RRAM
CT Chou, CW Hsu, CC Chang, TH Hou
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