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Byungsub Kim
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A 10-Gb/s compact low-power serial I/O with DFE-IIR equalization in 65-nm CMOS
B Kim, Y Liu, TO Dickson, JF Bulzacchelli, DJ Friedman
IEEE Journal of Solid-State Circuits 44 (12), 3526-3538, 2009
1802009
5.8 A 9.3 nW all-in-one bandgap voltage and current reference circuit
Y Ji, C Jeon, H Son, B Kim, HJ Park, JY Sim
2017 IEEE International Solid-State Circuits Conference (ISSCC), 100-101, 2017
1052017
5.7 A 29nW bandgap reference circuit
JM Lee, Y Ji, S Choi, YC Cho, SJ Jang, JS Choi, B Kim, HJ Park, JY Sim
2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015
952015
A 4Gb/s/ch 356fJ/b 10mm equalized on-chip interconnect with nonlinear charge-injecting transmit filter and transimpedance receiver in 90nm CMOS
B Kim, V Stojanovic
2009 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2009
832009
An energy-efficient equalized transceiver for RC-dominant channels
B Kim, V Stojanović
IEEE Journal of Solid-State Circuits 45 (6), 1186-1197, 2010
582010
A 192-pW Voltage Reference Generating Bandgap– With Process and Temperature Dependence Compensation
Y Ji, J Lee, B Kim, HJ Park, JY Sim
IEEE Journal of Solid-State Circuits 54 (12), 3281-3291, 2019
562019
Equalized interconnects for on-chip networks: Modeling and optimization framework
B Kim, V Stojanovic
2007 IEEE/ACM International Conference on Computer-Aided Design, 552-559, 2007
542007
Current-mode transceiver for silicon interposer channel
SH Lee, SK Lee, B Kim, HJ Park, JY Sim
IEEE Journal of Solid-State Circuits 49 (9), 2044-2053, 2014
402014
A FIR-embedded phase interpolator based noise filtering for wide-bandwidth fractional-N PLL
DW Jee, Y Suh, B Kim, HJ Park, JY Sim
IEEE journal of solid-state circuits 48 (11), 2795-2804, 2013
392013
Circuits and methods for DFE with reduced area and power consumption
JF Bulzacchelli, B Kim
US Patent 8,477,833, 2013
382013
24.8 an analog-digital-hybrid single-chip RX beamformer with non-uniform sampling for 2D-CMUT ultrasound imaging to achieve wide dynamic range of delay and small chip area
JY Um, EW Song, YJ Kim, SE Cho, MK Chae, J Song, B Kim, S Lee, ...
2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014
372014
A single-chip 64-channel ultrasound RX-beamformer including analog front-end and an LUT for non-uniform ADC-sample-clock generation
YJ Kim, SE Cho, JY Um, MK Chae, J Bang, J Song, T Jeon, B Kim, JY Sim, ...
IEEE Transactions on Biomedical Circuits and Systems 11 (1), 87-97, 2016
352016
An analog-digital hybrid RX beamformer chip with non-uniform sampling for ultrasound medical imaging with 2D CMUT array
JY Um, YJ Kim, SE Cho, MK Chae, J Song, B Kim, S Lee, J Bang, Y Kim, ...
IEEE transactions on biomedical circuits and systems 8 (6), 799-809, 2014
352014
A delay locked loop with a feedback edge combiner of duty-cycle corrector with a 20%–80% input duty cycle for SDRAMs
JH Lim, JH Bae, J Jang, HK Jung, H Lee, Y Kim, B Kim, JY Sim, HJ Park
IEEE Transactions on Circuits and Systems II: Express Briefs 63 (2), 141-145, 2015
342015
An 80 mV-swing single-ended duobinary transceiver with a TIA RX termination for the point-to-point DRAM interface
SM Lee, IM Yi, HK Jung, H Lee, YJ Kim, YS Kim, B Kim, JY Sim, HJ Park
IEEE Journal of Solid-State Circuits 49 (11), 2618-2630, 2014
342014
An 84.6-dB-SNDR and 98.2-dB-SFDR residue-integrated SAR ADC for low-power sensor applications
S Choi, HS Ku, H Son, B Kim, HJ Park, JY Sim
IEEE Journal of Solid-State Circuits 53 (2), 404-417, 2018
322018
5.5 A quadrature relaxation oscillator with a process-induced frequency-error compensation loop
J Koo, KS Moon, B Kim, HJ Park, JY Sim
2017 IEEE International Solid-State Circuits Conference (ISSCC), 94-95, 2017
312017
A low-power wide dynamic-range current readout circuit for ion-sensitive FET sensors
H Son, H Cho, J Koo, Y Ji, B Kim, HJ Park, JY Sim
IEEE transactions on biomedical circuits and systems 11 (3), 523-533, 2017
292017
Designing energy-efficient low-diameter on-chip networks with equalized interconnects
A Joshi, B Kim, V Stojanovic
2009 17th IEEE Symposium on High Performance Interconnects, 3-12, 2009
292009
A 2 GHz synthesized fractional-N ADPLL with dual-referenced interpolating TDC
S Kim, S Hong, K Chang, H Ju, J Shin, B Kim, HJ Park, JY Sim
IEEE Journal of Solid-State Circuits 51 (2), 391-400, 2015
282015
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Articles 1–20