John Rozen
John Rozen
IBM TJ Watson Research Center
Verified email at - Homepage
Cited by
Cited by
Density of interface states, electron traps, and hole traps as a function of the nitrogen density in SiO2 on SiC
J Rozen, S Dhar, ME Zvanut, JR Williams, LC Feldman
Journal of Applied Physics 105 (12), 2009
Scaling between channel mobility and interface state density in SiC MOSFETs
J Rozen, AC Ahyi, X Zhu, JR Williams, LC Feldman
IEEE Transactions on Electron Devices 58 (11), 3808-3811, 2011
Two-dimensional current percolation in nanocrystalline vanadiumdioxide films
J Rozen, R Lopez, RF Haglund, LC Feldman
Applied Physics Letters 88 (8), 2006
ECRAM as scalable synaptic cell for high-speed, low-power neuromorphic computing
J Tang, D Bishop, S Kim, M Copel, T Gokmen, T Todorov, SH Shin, ...
2018 IEEE International Electron Devices Meeting (IEDM), 13.1. 1-13.1. 4, 2018
Increase in oxide hole trap density associated with nitrogen incorporation at the SiO2/SiC interface
J Rozen, S Dhar, SK Dixit, VV Afanas’ev, FO Roberts, HL Dang, S Wang, ...
Journal of Applied Physics 103 (12), 2008
Phosphorous passivation of the SiO2/4H–SiC interface
YK Sharma, AC Ahyi, T Issacs-Smith, X Shen, ST Pantelides, X Zhu, ...
Solid-State Electronics, 2011
Capacitance-voltage and deep-level-transient spectroscopy characterization of defects near SiO2/SiC interfaces
AF Basile, J Rozen, JR Williams, LC Feldman, PM Mooney
Journal of Applied Physics 109 (6), 2011
Pressure dependence of SiO2 growth kinetics and electrical properties on SiC
EA Ray, J Rozen, S Dhar, LC Feldman, JR Williams
Journal of Applied Physics 103 (2), 2008
Total Dose Radiation Response of Nitrided and Non-nitrided SiO/4H-SiC MOS Capacitors
SK Dixit, S Dhar, J Rozen, S Wang, RD Schrimpf, DM Fleetwood, ...
IEEE transactions on nuclear science 53 (6), 3687-3692, 2006
Metal-oxide based, CMOS-compatible ECRAM for deep learning accelerator
S Kim, T Todorov, M Onen, T Gokmen, D Bishop, P Solomon, KT Lee, ...
2019 IEEE International Electron Devices Meeting (IEDM), 35.7. 1-35.7. 4, 2019
Systematic structural and chemical characterization of the transition layer at the interface of NO-annealed 4H-SiC/SiO2 metal-oxide-semiconductor field-effect transistors
JA Taillon, J Hyuk Yang, CA Ahyi, J Rozen, JR Williams, LC Feldman, ...
Journal of Applied Physics 113 (4), 2013
High Mobility High-Ge-Content SiGe PMOSFETs Using Al2O3/HfO2 Stacks With In-Situ O3 Treatment
T Ando, P Hashemi, J Bruley, J Rozen, Y Ogawa, S Koswatta, KK Chan, ...
IEEE Electron Device Letters 38 (3), 303-305, 2017
Suppression of interface state generation upon electron injection in nitrided oxides grown on 4H-SiC
J Rozen, S Dhar, ST Pantelides, LC Feldman, S Wang, JR Williams, ...
Applied Physics Letters 91 (15), 2007
The effect of nitrogen plasma anneals on interface trap density and channel mobility for 4H–SiC MOS devices
X Zhu, AC Ahyi, M Li, Z Chen, J Rozen, LC Feldman, JR Williams
Solid-state electronics 57 (1), 76-79, 2011
Charge trapping properties of 3C-and 4H-SiC MOS capacitors with nitrided gate oxides
R Arora, J Rozen, DM Fleetwood, KF Galloway, CX Zhang, J Han, ...
Ieee transactions on nuclear science 56 (6), 3185-3191, 2009
Binary metal oxide based interlayer for high mobility channels
V Narayanan, Y Ogawa, J Rozen
US Patent 9,972,695, 2018
High-performance CMOS-compatible self-aligned In0.53Ga0.47As MOSFETs with GMSAT over 2200 S/m at VDD = 0.5 V
Y Sun, A Majumdar, CW Cheng, RM Martin, RL Bruce, JB Yau, DB Farmer, ...
2014 IEEE International Electron Devices Meeting, 25.3. 1-25.3. 4, 2014
Replacement high-K/metal-gate High-Ge-content strained SiGe FinFETs with high hole mobility and excellent SS and reliability at aggressive EOT∼ 7 and scaled dimensions down…
P Hashemi, T Ando, K Balakrishnan, E Cartier, M Lofaro, JA Ott, J Bruley, ...
2016 IEEE Symposium on VLSI Technology, 1-2, 2016
Enhancing interface quality by gate dielectric deposition on a nitrogen-conditioned 4H–SiC surface
J Rozen, M Nagano, H Tsuchida
Journal of Materials Research 28 (1), 28-32, 2013
High performance and low leakage current InGaAs-on-silicon FinFETs with 20 nm gate length
X Sun, C D'Emic, CW Cheng, A Majumdar, Y Sun, E Cartier, RL Bruce, ...
2017 Symposium on VLSI Technology, T40-T41, 2017
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