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Vincent Beroulle
Vincent Beroulle
Univ. Grenoble Alpes
Verified email at lcis.grenoble-inp.fr - Homepage
Title
Cited by
Cited by
Year
Monolithic piezoresistive CMOS magnetic field sensors
V Beroulle, Y Bertrand, L Latorre, P Nouet
Sensors and Actuators A: Physical 103 (1-2), 23-32, 2003
1042003
Functional verification of rtl designs driven by mutation testing metrics
Y Serrestou, V Beroulle, C Robach
10th Euromicro Conference on Digital System Design Architectures, Methods …, 2007
452007
Laser fault injection at the CMOS 28 nm technology node: an analysis of the fault model
JM Dutertre, V Beroulle, P Candelier, S De Castro, LB Faber, ML Flottes, ...
2018 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC), 1-6, 2018
422018
Antennas for RFID tags
S Tedjini, TP Vuong, V Beroulle
Proceedings of the 2005 joint conference on Smart objects and ambient …, 2005
412005
Voltage glitch attacks on mixed-signal systems
N Beringuier-Boher, K Gomina, D Hely, JB Rigaud, V Beroulle, A Tria, ...
2014 17th Euromicro Conference on Digital System Design, 379-386, 2014
382014
A multiple fault injection methodology based on cone partitioning towards RTL modeling of laser attacks
A Papadimitriou, D Hély, V Beroulle, P Maistri, R Leveugle
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-4, 2014
342014
Hardware security evaluation platform for MCU-based connected devices: application to healthcare IoT
Z Kazemi, A Papadimitriou, D Hely, M Fazcli, V Beroulle
2018 IEEE 3rd International Verification and Security Workshop (IVSW), 87-92, 2018
322018
Evaluation of the oscillation-based test methodology for micro-electro-mechanical systems
V Beroulle, Y Bertrand, L Latorre, P Nouet
Proceedings 20th IEEE VLSI Test Symposium (VTS 2002), 439-444, 2002
302002
A DFT architecture for asynchronous networks-on-chip
XT Tran, J Durupt, F Bertrand, V Beroulle, C Robach
Eleventh IEEE European Test Symposium (ETS'06), 219-224, 2006
292006
Design-for-test approach of an asynchronous network-on-chip architecture and its associated test pattern generation and application
XT Tran, Y Thonnart, J Durupt, V Beroulle, C Robach
IET computers & digital techniques 3 (5), 487-500, 2009
282009
Novel ECC-based RFID mutual authentication protocol for emerging IoT applications
S Gabsi, Y Kortli, V Beroulle, Y Kieffer, A Alasiry, B Hamdi
IEEE access 9, 130895-130913, 2021
272021
Test and testability of a monolithic MEMS for magnetic field sensing
V Beroulle, Y Bertrand, L Latorre, P Nouet
Journal of electronic testing 17 (5), 439-450, 2001
272001
RFID System On-line Testing based on the evaluation of the Tags Read-Error-Rate
G Fritz, V Beroulle, OEK Aktouf, MD Nguyen, D Hély
Journal of Electronic Testing 27, 267-276, 2011
262011
A design-for-test implementation of an asynchronous network-on-chip architecture and its associated test pattern generation and application
XT Tran, Y Thonnart, J Durupt, V Beroulle, C Robach
Second ACM/IEEE International Symposium on Networks-on-Chip (nocs 2008), 149-158, 2008
252008
Micromachined CMOS magnetic field sensors with low-noise signal conditioning
V Beroulle, Y Bertrand, L Latorre, P Nouet
Technical Digest. MEMS 2002 IEEE International Conference. Fifteenth IEEE …, 2002
242002
On the performance of non-profiled differential deep learning attacks against an AES encryption algorithm protected using a correlated noise generation based hiding countermeasure
A Alipour, A Papadimitriou, V Beroulle, E Aerabi, D Hély
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 614-617, 2020
222020
Cross-layer analysis of software fault models and countermeasures against hardware fault attacks in a RISC-V processor
J Laurent, V Beroulle, C Deleuze, F Pebay-Peyroula, A Papadimitriou
Microprocessors and Microsystems 71, 102862, 2019
222019
Behavioral modeling and simulation of antennas: radio-frequency identification case study
V Beroulle, R Khouri, T Vuong, S Tedjini
Proceedings of the 2003 IEEE International Workshop on Behavioral Modeling …, 2003
212003
Hardware security vulnerability assessment to identify the potential risks in a critical embedded application
Z Kazemi, M Fazeli, D Hely, V Beroulle
2020 IEEE 26th International Symposium on On-Line Testing and Robust System …, 2020
202020
On a low cost fault injection framework for security assessment of cyber-physical systems: Clock glitch attacks
Z Kazemi, A Papadimitriou, I Souvatzoglou, E Aerabi, MM Ahmed, D Hely, ...
2019 IEEE 4th International Verification and Security Workshop (IVSW), 7-12, 2019
202019
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