Efficient parallel architecture for linear feedback shift registers J Jung, H Yoo, Y Lee, IC Park IEEE Transactions on Circuits and Systems II: Express Briefs 62 (11), 1068-1072, 2015 | 45 | 2015 |
Low-complexity tree architecture for finding the first two minima Y Lee, B Kim, J Jung, IC Park IEEE Transactions on Circuits and Systems II: Express Briefs 62 (1), 61-64, 2014 | 41 | 2014 |
Area-efficient multimode encoding architecture for long BCH codes H Yoo, J Jung, J Jo, IC Park IEEE Transactions on Circuits and Systems II: Express Briefs 60 (12), 872-876, 2013 | 35 | 2013 |
A 2.74-pJ/bit, 17.7-Gb/s iterative concatenated-BCH decoder in 65-nm CMOS for NAND flash memory Y Lee, H Yoo, J Jung, J Jo, IC Park IEEE journal of solid-state circuits 48 (10), 2531-2540, 2013 | 33 | 2013 |
Multi-bit flipping decoding of LDPC codes for NAND storage systems J Jung, IC Park IEEE Communications Letters 21 (5), 979-982, 2017 | 32 | 2017 |
Energy-scalable 4KB LDPC decoding architecture for NAND-flash-based storage systems Y Lee, J Jung, IC Park IEICE Transactions on Electronics 99 (2), 293-301, 2016 | 11 | 2016 |
LDPC decoder, semiconductor memory system and operating method thereof I Park, J Jung US Patent 10,103,749, 2018 | 10 | 2018 |
Area-efficient approach for generating quantized gaussian noise J Choi, J Jung, IC Park IEEE Transactions on Circuits and Systems I: Regular Papers 63 (7), 1005-1013, 2016 | 10 | 2016 |
Energy-efficient symmetric BC-BCH decoder architecture for mobile storages S Hwang, S Moon, J Jung, D Kim, IC Park, J Ha, Y Lee IEEE Transactions on Circuits and Systems I: Regular Papers 66 (11), 4462-4475, 2019 | 8 | 2019 |
An energy-optimized (37840, 34320) symmetric BC-BCH decoder for healthy mobile storages S Hwang, J Jung, D Kim, J Ha, IC Park, Y Lee 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC), 169-172, 2017 | 6 | 2017 |
Performance Evaluation of Low Complexity and Low Cost Automotive Real-Time Ethernet Network M Hwang, I Yoo, J Jung, S Kim, I Park IEIE Conference 36 (1), 428-431, 2013 | 6 | 2013 |
A 2.4 pJ/bit, 6.37 Gb/s SPC-enhanced BC-BCH decoder in 65nm CMOS for NAND flash storage systems J Jung, IC Park, Y Lee 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), 329-330, 2018 | 5 | 2018 |
Unidirectional ring ethernet for low-complexity in-vehicle control network I Yoo, M Hwang, J Jung, S Kim, IC Park 2015 IEEE International Conference on Industrial Technology (ICIT), 1951-1955, 2015 | 4 | 2015 |
Interference cancellation architecture for pipelined parallel MIMO detectors BY Kong, J Jung, IC Park 2018 25th IEEE International Conference on Electronics, Circuits and Systems …, 2018 | 2 | 2018 |
Area‐efficient method to approximate two minima for LDPC decoders J Jung, Y Lee, IC Park Electronics Letters 50 (23), 1701-1702, 2014 | 2 | 2014 |