| A 0.086-mm 12.7-pJ/SOP 64k-Synapse 256-Neuron Online-Learning Digital Spiking Neuromorphic Processor in 28nm CMOS C Frenkel, M Lefebvre, JD Legat, D Bol IEEE Transactions on Biomedical Circuits and Systems 13 (1), 145-158, 2019 | 234 | 2019 |
| MorphIC: A 65-nm 738k-Synapse/mm Quad-Core Binary-Weight Digital Neuromorphic Processor with Stochastic Spike-Driven Online Learning C Frenkel, JD Legat, D Bol IEEE Transactions on Biomedical Circuits and Systems 13 (5), 999-1010, 2019 | 87 | 2019 |
| Hand-gesture recognition based on EMG and event-based camera sensor fusion: A benchmark in neuromorphic computing E Ceolini*, C Frenkel*, SB Shrestha*, G Taverni, L Khacef, M Payvand, ... Frontiers in Neuroscience 14, 2020 | 68 | 2020 |
| SleepTalker: A ULV 802.15. 4a IR-UWB transmitter SoC in 28-nm FDSOI achieving 14 pJ/b at 27 Mb/s with channel selection based on adaptive FBB and digitally programmable pulse … G de Streel, F Stas, T Gurne, F Durant, C Frenkel, A Cathelin, D Bol IEEE Journal of Solid-State Circuits 52 (4), 1163-1177, 2017 | 62 | 2017 |
| Learning without feedback: Fixed random learning signals allow for feedforward training of deep neural networks C Frenkel*, M Lefebvre*, D Bol Frontiers in neuroscience 15, 2021 | 48* | 2021 |
| A 28-nm Convolutional Neuromorphic Processor Enabling Online Learning with Spike-Based Retinas C Frenkel, JD Legat, D Bol 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020 | 32 | 2020 |
| 19.6 a 40-to-80MHz sub-4μW/MHz ulv cortex-M0 MCU SoC in 28nm FDSOI with dual-loop adaptive back-bias generator for 20μs wake-up from deep fully retentive sleep mode D Bol, M Schramme, L Moreau, T Haine, P Xu, C Frenkel, R Dekimpe, ... 2019 IEEE International Solid-State Circuits Conference-(ISSCC), 322-324, 2019 | 29 | 2019 |
| Bottom-up and top-down neural processing systems design: Neuromorphic intelligence as the convergence of natural and artificial intelligence C Frenkel, D Bol, G Indiveri arXiv preprint arXiv:2106.01288, 2021 | 24 | 2021 |
| A fully-synthesized 20-gate digital spike-based synapse with embedded online learning C Frenkel, G Indiveri, JD Legat, D Bol 2017 IEEE international symposium on circuits and systems (ISCAS), 1-4, 2017 | 16 | 2017 |
| PCM-trace: Scalable Synaptic Eligibility Traces with Resistivity Drift of Phase-Change Materials Y Demirağ, F Moro, T Dalgaty, G Navarro, C Frenkel, G Indiveri, ... 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2021 | 14 | 2021 |
| SleepRunner: A 28-nm FDSOI ULP Cortex-M0 MCU With ULL SRAM and UFBR PVT Compensation for 2.6–3.6-μW/DMIPS 40–80-MHz Active Mode and 131-nW … D Bol, M Schramme, L Moreau, P Xu, R Dekimpe, R Saeidi, T Haine, ... IEEE Journal of Solid-State Circuits 56 (7), 2256-2269, 2021 | 13 | 2021 |
| Online training of spiking recurrent neural networks with phase-change memory synapses Y Demirag, C Frenkel, M Payvand, G Indiveri arXiv preprint arXiv:2108.01804, 2021 | 12 | 2021 |
| A compact phenomenological digital neuron implementing the 20 Izhikevich behaviors C Frenkel, JD Legat, D Bol 2017 IEEE Biomedical Circuits and Systems Conference (BioCAS), 1-4, 2017 | 11 | 2017 |
| Bottom-up and top-down neuromorphic processor design: Unveiling roads to embedded cognition C Frenkel Ph. D. dissertation, 2020 | 9 | 2020 |
| A Partial Reconfiguration-based scheme to mitigate Multiple-Bit Upsets for FPGAs in low-cost space applications C Frenkel, JD Legat, D Bol 2015 10th International Symposium on Reconfigurable Communication-centric …, 2015 | 9 | 2015 |
| ReckOn: A 28nm sub-mm2 task-agnostic spiking recurrent neural network processor enabling on-chip learning over second-long timescales C Frenkel, G Indiveri 2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 1-3, 2022 | 7 | 2022 |
| A 65-nm 738k-Synapse/mm2 Quad-Core Binary-Weight Digital Neuromorphic Processor with Stochastic Spike-Driven Online Learning C Frenkel, JD Legat, D Bol 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019 | 6 | 2019 |
| Spiking neural network integrated circuits: A review of trends and future directions A Basu, L Deng, C Frenkel, X Zhang 2022 IEEE Custom Integrated Circuits Conference (CICC), 1-8, 2022 | 5 | 2022 |
| Comparative analysis of redundancy schemes for soft-error detection in low-cost space applications C Frenkel, JD Legat, D Bol 2016 IFIP/IEEE International Conference on Very Large Scale Integration …, 2016 | 5 | 2016 |
| Sparsity provides a competitive advantage C Frenkel Nature Machine Intelligence 3 (9), 742-743, 2021 | 4 | 2021 |
David BolECS group, ICTEAM institute, Université catholique de LouvainVerified email at uclouvain.be
