Mawahib Hussein Sulieman
Mawahib Hussein Sulieman
Verified email at aau.ac.ae - Homepage
TitleCited byYear
On the reliability of majority gates full adders
W Ibrahim, V Beiu, MH Sulieman
IEEE Transactions on nanotechnology 7 (1), 56-67, 2008
732008
On single-electron technology full adders
MH Sulieman, V Beiu
IEEE Transactions on Nanotechnology 4 (6), 669-680, 2005
522005
On Single Electron Technology Full Adders
M Sulieman, V Beiu
Nanotechnology 2004, IEEE-NANO 2004, 317-320, 2004
522004
Design and analysis of SET circuits: Using MATLAB modules and SIMON
M Sulieman, V Beiu
4th IEEE Conference on Nanotechnology, 2004., 618-621, 2004
292004
Characterization of a 16-bit threshold logic single-electron technology adder
M Sulieman, V Beiu
2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No …, 2004
292004
Low-power and highly reliable logic gates transistor-level optimizations
MH Sulieman, V Beiu, W Ibrahim
10th IEEE International Conference on Nanotechnology, 254-257, 2010
252010
Gate Failures Effectively Shape Multiplexing
V Beiu, W Ibrahim, YA Alkhawwar, MH Sulieman
IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems …, 2006
202006
On practical multiplexing issues
V Beiu, MH Sulieman
2006 Sixth IEEE Conference on Nanotechnology 1, 310-313, 2006
122006
Threshold logic: from vacuum tubes to nanoelectronics
V Beiu, JM Quintana, MJ Avedillo, M Sulieman
2003 46th Midwest Symposium on Circuits and Systems 2, 930-935, 2003
72003
On the reliability of interconnected CMOS gates considering MOSFET threshold-voltage variations
MH Sulieman
International Conference on Nano-Networks, 251-258, 2009
52009
Femto Joule Switching for Nano Electronics.
V Beiu, J Nyathi, S Aunet, MH Sulieman
AICCSA, 415-423, 2006
52006
Multiplexing Schemes in Single-Electron Technology
MH Sulieman, V Beiu
IEEE International Conference on Computer Systems and Applications, 424-428, 2006
42006
Design and Analysis of Single-Electron Technology Neural-Inspired Gates and Arithmetic Circuits
MH Sulieman
PhD Thesis, Washington State University, 2004
42004
Threshold-voltage variations effects on the reliability of nano-scale CMOS logic gates
MH Sulieman
2009 9th IEEE Conference on Nanotechnology (IEEE-NANO), 744-747, 2009
32009
Optimal Practical Adders using Perceptrons
M Sulieman, V Beiu
Proceedings of 2003 International Conference on Neural Networks and Signal …, 2003
32003
Low-Power Reliable Nano Adders
A Beg, M Sulieman, V Beiu, W Ibrahim
Low-Power Reliable Nano Adders, 2017
2*2017
On the Design of Nanoscale CMOS Threshold-Logic Adders
MH Sulieman, ZFA Himat
2018 15th International Multi-Conference on Systems, Signals & Devices (SSD …, 2018
12018
Parallel Pipeline to ATM: Graphical Simulation Techniques
M Sulieman, CH Ooi, M Fleury
Proceedings of the Fifteenth Annual UK Performance Engineering Workshop …, 1999
11999
Reliability of single-electron logic gates
MH Sulieman, UA EMIRATES
Proceedings of the 6th conference on Microelectronics, nanoelectronics …, 2007
2007
On the Design of SET Adders
M Sulieman, V Beiu
NSTI Nanotechnology Conference, 169-172, 2004
2004
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