| Moat: Verifying Confidentiality of Enclave Programs R Sinha, S Rajamani, SA Seshia, K Vaswani ACM CCS 2015, 1169-1184, 2015 | 123 | 2015 |
| A Formal Foundation for Secure Remote Execution of Enclaves P Subramanyan, R Sinha, I Lebedev, S Devadas, S Seshia ACM CCS 2017, 0 | 106* | |
| A design and verification methodology for secure isolated regions R Sinha, M Costa, A Lal, NP Lopes, S Rajamani, SA Seshia, K Vaswani Proceedings of the 37th ACM SIGPLAN Conference on Programming Language …, 2016 | 72 | 2016 |
| Parallel simulation of mixed-abstraction SystemC models on GPUs and multicore CPUs R Sinha, A Prakash, HD Patel Design Automation Conference (ASP-DAC), 2012 17th Asia and South Pacific …, 2012 | 64 | 2012 |
| A compiler and verifier for page access oblivious computation R Sinha, S Rajamani, SA Seshia Proceedings of the 2017 11th Joint Meeting on Foundations of Software …, 2017 | 32 | 2017 |
| Automatic rootcausing for program equivalence failures in binaries SK Lahiri, R Sinha, C Hawblitzel International Conference on Computer Aided Verification, 362-379, 2015 | 21 | 2015 |
| VeritasDB: High Throughput Key-Value Store with Integrity R Sinha, M Christodorescu | 17 | 2018 |
| High-throughput data integrity via trusted computing R Sinha, M Christodorescu US Patent App. 16/189,818, 2019 | 15 | 2019 |
| Abstract state machines as an intermediate representation for high-level synthesis R Sinha, HD Patel Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011, 1-6, 2011 | 10 | 2011 |
| synASM: A high-level synthesis framework with support for parallel and timed constructs R Sinha, HD Patel IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2012 | 8 | 2012 |
| Verification with small and short worlds R Sinha, C Sturton, P Maniatis, SA Seshia, D Wagner Formal Methods in Computer-Aided Design (FMCAD), 2012, 68-77, 2012 | 7 | 2012 |
| Verification of Quantitative Hyperproperties Using Trace Enumeration Relations S Sahai, R Sinha, P Subramanyan arXiv preprint arXiv:2005.04606, 2020 | 6 | 2020 |
| A User’s Guide to UCLID Version 3.1 BA Brady, SA Seshia, R Sinha, SK Lahiri, RE Bryant | 6 | 2015 |
| Symbolic software model validation C Sturton, R Sinha, THY Dang, S Jain, M McCoyd, WY Tan, P Maniatis, ... Formal Methods and Models for Codesign (MEMOCODE), 2013 Eleventh IEEE/ACM …, 2013 | 5 | 2013 |
| Formal modeling and verification of cloudproxy WY Tan, R Sinha, JL Manferdelli, SA Seshia Working Conference on Verified Software: Theories, Tools, and Experiments …, 2014 | 4 | 2014 |
| Amortized Threshold Symmetric-key Encryption M Christodorescu, S Gaddam, P Mukherjee, R Sinha ACM CCS 2021, 2021 | 3 | 2021 |
| LucidiTEE: Policy-based Fair Computing at Scale R Sinha, S Gaddam, R Kumaresan | 2 | 2019 |
| System and Method for Fair, Secure N-Party Computation Using At Least One Blockchain RK Kumaresan, S Raghuraman, R Sinha US Patent App. 17/104,520, 2021 | 1 | 2021 |
| Techniques for performing secure operations S Gaddam, R Sinha, A Luykx, H Yang US Patent App. 17/051,715, 2021 | 1 | 2021 |
| Secure Computing using Certified Software and Trusted Hardware R Sinha University of California, Berkeley, 2017 | 1 | 2017 |
Sanjit A. SeshiaUniversity of California, BerkeleyVerified email at eecs.berkeley.edu
