| Exploring the tradeoffs between programmability and efficiency in data-parallel accelerators Y Lee, R Avizienis, A Bishara, R Xia, D Lockhart, C Batten, K Asanović ACM SIGARCH Computer Architecture News 39 (3), 129-140, 2011 | 175 | 2011 |
| PyMTL: A unified framework for vertically integrated computer architecture research D Lockhart, G Zibrat, C Batten Proceedings of the 47th Annual IEEE/ACM International Symposium on …, 2014 | 152 | 2014 |
| Characterization of error-tolerant applications when protecting control data DD Thaker, D Franklin, J Oliver, S Biswas, D Lockhart, T Metodi, ... 2006 IEEE International Symposium on Workload Characterization, 142-149, 2006 | 54 | 2006 |
| Efficient fault tolerance in multi-media applications through selective instruction replication A Sundaram, A Aakel, D Lockhart, D Thaker, D Franklin Proceedings of the 2008 workshop on Radiation effects and fault tolerance in …, 2008 | 53 | 2008 |
| Microarchitectural mechanisms to exploit value structure in SIMT architectures J Kim, C Torng, S Srinath, D Lockhart, C Batten Proceedings of the 40th Annual International Symposium on Computer …, 2013 | 45 | 2013 |
| Exploring the tradeoffs between programmability and efficiency in data-parallel accelerators Y Lee, R Avizienis, A Bishara, R Xia, D Lockhart, C Batten, K Asanović ACM Transactions on Computer Systems (TOCS) 31 (3), 1-38, 2013 | 29 | 2013 |
| Pydgin: generating fast instruction set simulators from simple architecture descriptions with meta-tracing JIT compilers D Lockhart, B Ilbeyi, C Batten 2015 IEEE International Symposium on Performance Analysis of Systems and …, 2015 | 21 | 2015 |
| Pydgin for RISC-V: A Fast and Productive Instruction-Set Simulator B Ilbeyi, D Lockhart, C Batten Extended Abstract for Presentation at the 3rd RISC-V Workshop, 2016 | 5 | 2016 |
| Hardware generation languages as a foundation for credible, reproducible, and productive research methodologies D Lockhart, C Batten Workshop on Reproducible Research Methodologies (REPRODUCE), 2014 | 4 | 2014 |
| Constructing Vertically Integrated Hardware Design Methodologies Using Embedded Domain-Specific Languages And Just-In-Time Optimization D Lockhart | 2 | 2015 |
| The Maven vector-thread architecture Y Lee, R Avizienis, A Bishara, R Xia, D Lockhart, C Batten, K Asanovic 2011 IEEE Hot Chips 23 Symposium (HCS), 1-1, 2011 | 2 | 2011 |
| Characterization of Error-Tolerant Applications while Protecting Control Data S Biswas, DD Thaker, D Franklin, J Oliver, D Lockhart, T Metodi, ... The Second Annual Graduate Student Workshop on Computing, 12, 2007 | | 2007 |
| Compiler Assisted In-situ Instruction Replication as a Mechanism for Efficient Fault Tolerance D Lockhart California Polytechnic State University, 2007 | | 2007 |
