Philip Colangelo
Philip Colangelo
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Exploration of low numeric precision deep learning inference using Intel® FPGAs
P Colangelo, N Nasiri, E Nurvitadhi, A Mishra, M Margala, K Nealis
2018 IEEE 26th annual international symposium on field-programmable custom …, 2018
Sparkcl: A unified programming framework for accelerators on heterogeneous clusters
O Segal, P Colangelo, N Nasiri, Z Qian, M Margala
arXiv preprint arXiv:1505.01120, 2015
In-package domain-specific ASICs for Intel® Stratix® 10 FPGAs: a case study of accelerating deep learning using TensorTile ASIC
E Nurvitadhi, J Cook, A Mishra, D Marr, K Nealis, P Colangelo, A Ling, ...
2018 28th International Conference on Field Programmable Logic and …, 2018
Application of convolutional neural networks on Intel® Xeon® processor with integrated FPGA
P Colangelo, E Luebbers, R Huang, M Margala, K Nealis
2017 IEEE High Performance Extreme Computing Conference (HPEC), 1-7, 2017
Artificial neural network and accelerator co-design using evolutionary algorithms
P Colangelo, O Segal, A Speicher, M Margala
2019 IEEE High Performance Extreme Computing Conference (HPEC), 1-8, 2019
Aparapi-UCores: A high level programming framework for unconventional cores
O Segal, P Colangelo, N Nasiri, Z Qian, M Margala
2015 IEEE high performance extreme computing conference (HPEC), 1-6, 2015
Fine-grained acceleration of binary neural networks using intel® xeon® processor with integrated fpga
P Colangelo, R Huang, E Luebbers, M Margala, K Nealis
2017 IEEE 25th Annual International Symposium on Field-Programmable Custom …, 2017
Evolutionary cell aided design for neural network architectures
P Colangelo, O Segal, A Speicher, M Margala
arXiv preprint arXiv:1903.02130, 2019
AutoML for Multilayer Perceptron and FPGA Co-design
P Colangelo, O Segal, A Speicher, M Margala
2020 IEEE 33rd International System-on-Chip Conference (SOCC), 265-266, 2020
BFLOAT MLP Training Accelerator for FPGAs
A Hagiescu, M Langhammer, B Pasca, P Colangelo, J Thong, N Ilkhani
2019 International Conference on ReConFigurable Computing and FPGAs …, 2019
Automated Hardware and Neural Network Architecture co-design of FPGA accelerators using multi-objective Neural Architecture Search
P Colangelo, O Segal, A Speicher, M Margala
2020 IEEE 10th International Conference on Consumer Electronics (ICCE-Berlin …, 2020
Sparse Persistent GEMM Accelerator using OpenCL for Intel FPGAs
P Colangelo, S Sengupta, M Margala
2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-6, 2020
Document classification systems in heterogeneous computing environments
N Nasiri, P Colangelo, O Segal, M Margala, W Vanderbauwhede
2016 26th International Workshop on Power and Timing Modeling, Optimization …, 2016
Kermin Fleming (Intel)
A Dehon, A Koch, A Schmidt, B Rouhani, B Hutchings, C Plessl, C Bobda, ...
Jason Agron, Intel Jason Anderson, University of Toronto David Andrews, University of Arkansas Kubilay Atasu, IBM
K Bazargan, J Becker, M Blott, C Bobda, D Boland, G Botella, ...
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