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Jaewan Choi
Jaewan Choi
Verified email at snu.ac.kr
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Year
MViD: Sparse matrix-vector multiplication in mobile DRAM for accelerating recurrent neural networks
B Kim, J Chung, E Lee, W Jung, S Lee, J Choi, J Park, M Wi, S Lee, ...
IEEE Transactions on Computers 69 (7), 955-967, 2020
272020
SHARP: A short-word hierarchical accelerator for robust and practical fully homomorphic encryption
J Kim, S Kim, J Choi, J Park, D Kim, JH Ahn
Proceedings of the 50th Annual International Symposium on Computer …, 2023
152023
Comparing BERT and XLNet from the perspective of computational characteristics
H Li, J Choi, S Lee, JH Ahn
2020 International Conference on Electronics, Information, and Communication …, 2020
112020
Accelerating transformer networks through recomposing softmax layers
J Choi, H Li, B Kim, S Hwang, JH Ahn
2022 IEEE International Symposium on Workload Characterization (IISWC), 92-103, 2022
82022
Unleashing the Potential of PIM: Accelerating Large Batched Inference of Transformer-Based Generative Models
J Choi, J Park, K Kyung, NS Kim, JH Ahn
IEEE Computer Architecture Letters, 2023
52023
Semiconductor memory device employing processing in memory (PIM) and operation method of the semiconductor memory device
S Seo, B Kim, J Park, J Ahn, WI Minbok, S Lee, LEE Eojin, J Wonkyung, ...
US Patent 11,139,033, 2021
52021
Row-streaming dataflow using a chaining buffer and systolic array+ structure
H Kim, S Lee, J Choi, JH Ahn
IEEE Computer Architecture Letters 20 (1), 34-37, 2021
52021
A slice and dice approach to accelerate compound sparse attention on gpu
H Li, J Choi, JH Ahn
2022 IEEE International Symposium on Workload Characterization (IISWC), 104-116, 2022
32022
Future scaling of memory hierarchy for tensor cores and eliminating redundant shared memory traffic using inter-warp multicasting
S Lee, S Hwang, MJ Kim, J Choi, JH Ahn
IEEE Transactions on Computers 71 (12), 3115-3126, 2022
32022
MVP: An Efficient CNN Accelerator with Matrix, Vector, and Processing-Near-Memory Units
S Lee, J Choi, W Jung, B Kim, J Park, H Kim, JH Ahn
ACM Transactions on Design Automation of Electronic Systems (TODAES) 27 (5 …, 2022
22022
Method and apparatus with data processing
Y Ro, B Kim, J Park, J Ahn, WI Minbok, S Lee, LEE Eojin, J Wonkyung, ...
US Patent 11,436,477, 2022
12022
AttAcc! Unleashing the Power of PIM for Batched Transformer-based Generative Model Inference
J Park, J Choi, K Kyung, MJ Kim, Y Kwon, NS Kim, JH Ahn
Proceedings of the 29th ACM International Conference on Architectural …, 2024
2024
Method and apparatus with data processing
Y Ro, B Kim, J Park, J Ahn, WI Minbok, S Lee, LEE Eojin, J Wonkyung, ...
US Patent 11,886,985, 2024
2024
A Hardware-Friendly Tiled Singular-Value Decomposition-Based Matrix Multiplication for Transformer-Based Models
H Li, J Choi, Y Kwon, JH Ahn
IEEE Computer Architecture Letters, 2023
2023
Semiconductor memory device employing processing in memory (PIM) and operation method of the semiconductor memory device
S Seo, B Kim, J Park, J Ahn, WI Minbok, S Lee, LEE Eojin, J Wonkyung, ...
US Patent 11,600,340, 2023
2023
Neural processor
D Kim, JH Ahn, S Lee, J Choi
US Patent 11,544,213, 2023
2023
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