| Low-complexity tree architecture for finding the first two minima Y Lee, B Kim, J Jung, IC Park IEEE Transactions on Circuits and Systems II: Express Briefs 62 (1), 61-64, 2014 | 41 | 2014 |
| Low-complexity low-latency architecture for matching of data encoded with hard systematic error-correcting codes BY Kong, J Jo, H Jeong, M Hwang, S Cha, B Kim, IC Park IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (7 …, 2013 | 29 | 2013 |
| Reverse rate matching for low-power LTE-advanced turbo decoders I Yoo, B Kim, IC Park IEEE Transactions on Circuits and Systems I: Regular Papers 62 (12), 2920-2928, 2015 | 11 | 2015 |
| Tail-overlapped SISO decoding for high-throughput LTE-advanced turbo decoders I Yoo, B Kim, IC Park IEEE Transactions on Circuits and Systems I: Regular Papers 61 (9), 2711-2720, 2014 | 9 | 2014 |
| Low-complexity parallel QPP interleaver based on permutation patterns B Kim, I Yoo, IC Park IEEE Transactions on Circuits and Systems II: Express Briefs 60 (3), 162-166, 2013 | 8 | 2013 |
| Area-efficient QC-LDPC decoder architecture based on stride scheduling and memory bank division B Kim, IC Park IEICE transactions on communications 96 (7), 1772-1779, 2013 | 4 | 2013 |
| Memory-optimized hybrid decoding method for multi-rate turbo codes I Yoo, B Kim, IC Park 2013 IEEE 77th Vehicular Technology Conference (VTC Spring), 1-5, 2013 | 2 | 2013 |
| Immediate Exchange of Extrinsic Information for High-Throughput Turbo Decoding I Yoo, B Kim, IC Park IEEE communications letters 16 (12), 2048-2051, 2012 | 1 | 2012 |
| Snoop-Free Multicore Architecture based on Dual-Core Clusters B Kim, J Song, CH Kim, E Kim, IC Park 대한전자공학회 ISOCC, 75-75, 2012 | | 2012 |
| Automotive ECU Platform using Fault-Tolerant Embedded Processor I Yoo, B Kim, BY Kong, DJ Yoon, IC Park 대한전자공학회 ISOCC, 56-56, 2012 | | 2012 |
| A 870㎒ 0.09㎟ 0.45㎽/㎒ 32b embedded processor using 65㎚ CMOS technology Y Lee, B Kim, IC Park 대한전자공학회 ISOCC, 74-74, 2012 | | 2012 |
| A 870㎒ 0.09㎟ 0.45㎽/㎒ 32b embedded processor using 65㎚ CMOS technology Y Lee, B Kim, IC Park 대한전자공학회 ISOCC, 74-74, 2012 | | 2012 |
| QC-LDPC Decoding Architecture based on Stride Scheduling B Kim, IC Park 2011 IEEE International Symposium of Circuits and Systems (ISCAS), 1319-1322, 2011 | | 2011 |
| Dual-rail decoding of low-density parity-check codes B Kim, H Ahmed, IC Park Proceedings of 2010 IEEE International Symposium on Circuits and Systems …, 2010 | | 2010 |
| Design of Efficient Embedded System YJ Lee, J Song, BJ Kim, E Kim, G Lim, IC Park IEEE International SoC Design Conference (ISOCC 2010) Chip Design Contest, 2010 | | 2010 |
| A 870MHz 0.09 mm 2 0.45 mW/MHz 32b embedded processor in 65nm CMOS technology Y Lee, B Kim, IC Park | | |
