Thomas Kauerauf
Thomas Kauerauf
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Origin of the threshold voltage instability in SiO2/HfO2 dual layer gate dielectrics
A Kerber, E Cartier, L Pantisano, R Degraeve, T Kauerauf, Y Kim, A Hou, ...
IEEE Electron Device Letters 24 (2), 87-89, 2003
Ultra low-EOT (5 Å) gate-first and gate-last high performance CMOS achieved by gate-electrode optimization
LÅ Ragnarsson, Z Li, J Tseng, T Schram, E Rohr, MJ Cho, T Kauerauf, ...
2009 IEEE International Electron Devices Meeting (IEDM), 1-4, 2009
Characterization of the V/sub T/-instability in SiO/sub 2//HfO/sub 2/gate dielectrics
A Kerber, E Cartier, L Pantisano, M Rosmeulen, R Degraeve, T Kauerauf, ...
2003 IEEE International Reliability Physics Symposium Proceedings, 2003 …, 2003
Method for tuning the effective work function of a gate structure in a semiconductor device
T Kauerauf, A Spessot, C Caillat
US Patent 9,076,726, 2015
Low Weibull slope of breakdown distributions in high-k layers
T Kauerauf, R Degraeve, E Cartier, C Soens, G Groeseneken
IEEE Electron Device Letters 23 (4), 215-217, 2002
Channel Hot Carrier Degradation Mechanism in Long/Short Channel -FinFETs
M Cho, P Roussel, B Kaczer, R Degraeve, J Franco, M Aoulaiche, ...
IEEE Transactions on Electron Devices 60 (12), 4002-4007, 2013
Charge trapping and dielectric reliability of SiO/sub 2/-Al/sub 2/O/sub 3/gate stacks with TiN electrodes
A Kerber, E Cartier, R Degraeve, PJ Roussel, L Pantisano, T Kauerauf, ...
IEEE Transactions on Electron Devices 50 (5), 1261-1269, 2003
A comprehensive reliability investigation of the voltage-, temperature-and device geometry-dependence of the gate degradation on state-of-the-art GaN-on-Si HEMTs
D Marcon, T Kauerauf, F Medjdoub, J Das, M Van Hove, P Srivastava, ...
2010 International Electron Devices Meeting, 20.3. 1-20.3. 4, 2010
Insight into N/PBTI mechanisms in sub-1-nm-EOT devices
M Cho, JD Lee, M Aoulaiche, B Kaczer, P Roussel, T Kauerauf, ...
IEEE Transactions on Electron Devices 59 (8), 2042-2048, 2012
Effect of bulk trap density on HfO/sub 2/reliability and yield
R Degraeve, A Kerber, P Roussell, E Cartier, T Kauerauf, L Pantisano, ...
IEEE International Electron Devices Meeting 2003, 38.5. 1-38.5. 4, 2003
Degradation and breakdown of 0.9 nm EOT SiO/sub 2/ALD HfO/sub 2/metal gate stacks under positive constant voltage stress
R Degraeve, T Kauerauf, M Cho, M Zahid, LA Ragnarsson, DP Brunco, ...
IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest …, 2005
Review of reliability issues in high-k/metal gate stacks
R Degraeve, M Aoulaiche, B Kaczer, P Roussel, T Kauerauf, S Sahhaf, ...
2008 15th International Symposium on the Physical and Failure Analysis of …, 2008
Suitability of high-k gate oxides for III–V devices: A PBTI study in In0.53Ga0.47As devices with Al2O3
J Franco, A Alian, B Kaczer, D Lin, T Ivanov, A Pourghaderi, K Martens, ...
2014 IEEE International Reliability Physics Symposium, 6A. 2.1-6A. 2.6, 2014
Towards understanding degradation and breakdown of SiO2/high-k stacks
T Kauerauf, R Degraeve, E Cartier, B Govoreanu, P Blomme, B Kaczer, ...
Digest. International Electron Devices Meeting,, 521-524, 2002
Scaling CMOS: Finding the gate stack with the lowest leakage current
T Kauerauf, B Govoreanu, R Degraeve, G Groeseneken, H Maes
Solid-state electronics 49 (5), 695-701, 2005
Channel Hot-Carrier Degradation in Short-Channel Transistors With High- /Metal Gate Stacks
E Amat, T Kauerauf, R Degraeve, A De Keersgieter, R Rodriguez, ...
IEEE Transactions on Device and Materials reliability 9 (3), 425-430, 2009
Stress polarity dependence of degradation and breakdown of SiO/sub 2//high-k stacks
R Degrave, T Kauerauf, A Kerber, E Cartier, B Govoreanu, P Roussel, ...
2003 IEEE International Reliability Physics Symposium Proceedings, 2003 …, 2003
Electrical characterisation of high-k materials prepared by atomic layer CVD
RJ Carter, E Cartier, M Caymax, S De Gendt, R Degraevel, ...
Extended Abstracts of International Workshop on Gate Insulator. IWGI 2001 …, 2001
Gate-last vs. gate-first technology for aggressively scaled EOT logic/RF CMOS
A Veloso, LÅ Ragnarsson, MJ Cho, K Devriendt, K Kellens, F Sebaai, ...
2011 Symposium on VLSI Technology-Digest of Technical Papers, 34-35, 2011
RTN and PBTI-induced time-dependent variability of replacement metal-gate high-k InGaAs FinFETs
J Franco, B Kaczer, N Waldron, PJ Roussel, A Alian, MA Pourghaderi, Z Ji, ...
2014 IEEE International Electron Devices Meeting, 20.2. 1-20.2. 4, 2014
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