| A 345 µW multi-sensor biomedical SoC with bio-impedance, 3-channel ECG, motion artifact reduction, and integrated DSP N Van Helleputte, M Konijnenburg, J Pettine, DW Jee, H Kim, A Morgado, ... IEEE Journal of Solid-State Circuits 50 (1), 230-244, 2014 | 220 | 2014 |
| A Multi(bio)sensor Acquisition System With Integrated Processor, Power Management, LED Drivers, and Simultaneously Synchronized ECG, BIO-Z, GSR, and … M Konijnenburg, S Stanzione, L Yan, DW Jee, J Pettine, R Van Wegberg, ... IEEE Journal of Solid-State Circuits 51 (11), 2584-2595, 2016 | 93 | 2016 |
| 18.3 A multi-parameter signal-acquisition SoC for connected personal health applications N Van Helleputte, M Konijnenburg, H Kim, J Pettine, DW Jee, ... 2014 IEEE international solid-state circuits conference digest of technical …, 2014 | 76 | 2014 |
| A 13 \mu {\rm A} Analog Signal Processing IC for Accurate Recognition of Multiple Intra-Cardiac Signals L Yan, J Pettine, S Mitra, S Kim, DW Jee, H Kim, M Osawa, Y Harada, ... Biomedical Circuits and Systems, IEEE Transactions on 7 (6), 785 - 795, 2013 | 69 | 2013 |
| A 2 GHz Fractional-N Digital PLL with 1b Noise Shaping ΔΣ TDC DW Jee, YH Seo, HJ Park, JY Sim Solid-State Circuits, IEEE Journal of 47 (4), 875-883, 2012 | 52 | 2012 |
| A 2 GHz fractional-N digital PLL with 1b noise shaping ΔΣ TDC DW Jee, YH Seo, HJ Park, JY Sim VLSI Circuits (VLSIC), 2011 Symposium on, 116 - 117, 2011 | 52 | 2011 |
| 28.4 A battery-powered efficient multi-sensor acquisition system with simultaneous ECG, BIO-Z, GSR, and PPG M Konijnenburg, S Stanzione, L Yan, DW Jee, J Pettine, R Van Wegberg, ... 2016 IEEE International Solid-State Circuits Conference (ISSCC), 480-481, 2016 | 39 | 2016 |
| A FIR-Embedded Phase Interpolator Based Noise Filtering for Wide-Bandwidth Fractional-N PLL DW Jee, Y Suh, B Kim, HJ Park, JY Sim Solid-State Circuits, IEEE Journal of 48 (11), 2795 - 2804, 2013 | 39 | 2013 |
| Noise-shaping time to digital converter (TDC) using delta-sigma modulation method DW Jee, JY Sim US Patent 8,421,661, 2013 | 30 | 2013 |
| A 0.052 mm2, <0.4% THD, Sinusoidal Current Generator for Bio-Impedance Measurement Using a Recursive Digital Oscillator and Current-Domain FIR Filter SK Hong, DW Jee IEEE Transactions on Circuits and Systems II: Express Briefs 66 (6), 894-898, 2018 | 22 | 2018 |
| A< 25 μW CMOS monolithic photoplethysmographic sensor with distributed 1b delta-sigma light-to-digital convertor HG Kim, DW Jee ESSCIRC 2017-43rd IEEE European Solid State Circuits Conference, 55-58, 2017 | 20 | 2017 |
| Design and calibration techniques for a multichannel FPGA-based time-to-digital converter in an object positioning system KJ Choi, DW Jee IEEE Transactions on Instrumentation and Measurement 70, 1-9, 2020 | 18 | 2020 |
| Digitally controlled leakage-based oscillator and fast relocking MDLL for ultra low power sensor platform DW Jee, D Sylvester, D Blaauw, JY Sim IEEE Journal of Solid-State Circuits 50 (5), 1263-1274, 2015 | 16 | 2015 |
| A 0.1-frefBW 1GHz fractional-N PLL with FIR-embedded phase-interpolator-based noise filtering DW Jee, Y Suh, HJ Park, JY Sim 2011 IEEE International Solid-State Circuits Conference, 94-96, 2011 | 16 | 2011 |
| Massive MIMO systems with low-resolution ADCs: Baseband energy consumption vs. symbol detection performance S Moon, IS Kim, D Kam, DW Jee, J Choi, Y Lee IEEE Access 7, 6650-6660, 2019 | 12 | 2019 |
| A 0.45 V 423nW 3.2 MHz multiplying DLL with leakage-based oscillator for ultra-low-power sensor platforms DW Jee, D Sylvester, D Blaauw, JY Sim 2013 IEEE International Solid-State Circuits Conference Digest of Technical …, 2013 | 10 | 2013 |
| A 28.7V Modular Supply Multiplying Pulser With 75.4% Power Reduction Relative to CV2f KJ Choi, HG Yeo, H Choi, DW Jee IEEE Transactions on Circuits and Systems II: Express Briefs 68 (3), 858-862, 2020 | 8 | 2020 |
| Spectral refining of organic photodiodes via chemical doping: from analyses to applications M Kang, SM Ko, J Kim, SZ Hassan, DW Jee, DS Chung Materials Horizons 7 (11), 3034-3042, 2020 | 8 | 2020 |
| Power-up control techniques for reliable SRAM PUF J Lee, DW Jee, D Jeon IEICE Electronics Express 16 (13), 20190296-20190296, 2019 | 7 | 2019 |
| A 8 GByte/s transceiver with current-balanced pseudo-differential signaling for memory interface SK Lee, DW Jee, Y Suh, HJ Park, JY Sim 2008 IEEE Asian Solid-State Circuits Conference, 237-240, 2008 | 7 | 2008 |
Jae-Yoon SimPohang University of Science and TechnologyVerified email at postech.ac.kr
