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Vivek Joshi
Vivek Joshi
GLOBALFOUNDRIES, University of Michigan
Verified email at umich.edu - Homepage
Title
Cited by
Cited by
Year
Logic SER reduction through flip flop redesign
V Joshi, RR Rao, D Blaauw, D Sylvester
7th International Symposium on Quality Electronic Design (ISQED'06), 6 pp.-616, 2006
652006
A 7nm CMOS technology platform for mobile and high performance compute application
S Narasimha, B Jagannathan, A Ogino, D Jaeger, B Greene, C Sheraw, ...
2017 IEEE International Electron Devices Meeting (IEDM), 29.5. 1-29.5. 4, 2017
632017
Soft-edge flip-flops for improved timing yield: design and optimization
V Joshi, D Blaauw, D Sylvester
2007 IEEE/ACM International Conference on Computer-Aided Design, 667-673, 2007
552007
Extracting and classifying requirements from software engineering contracts
A Sainani, PR Anish, V Joshi, S Ghaisas
2020 IEEE 28th international requirements engineering conference (RE), 147-157, 2020
512020
Stress aware layout optimization
V Joshi, B Cline, D Sylvester, D Blaauw, K Agarwal
Proceedings of the 2008 international symposium on Physical design, 168-174, 2008
362008
Leakage power reduction using stress-enhanced layouts
V Joshi, B Cline, D Sylvester, D Blaauw, K Agarwal
Proceedings of the 45th annual Design Automation Conference, 912-917, 2008
282008
Low-variation SRAM bitcells in 22nm FDSOI technology
V Joshi, H Ramamurthy, S Balasubramanian, S Seo, H Yoon, X Zou, ...
2017 Symposium on VLSI Technology, T222-T223, 2017
152017
Effective gate length circuit modeling based on concurrent length and mobility analysis
KB Agarwal, V Joshi
US Patent 8,151,240, 2012
142012
Deep learning diagnosis and classification of rotator cuff tears on shoulder MRI
DJ Lin, M Schwier, B Geiger, E Raithel, H Von Busch, J Fritz, M Kline, ...
Investigative radiology 58 (6), 405-412, 2023
132023
Circuit optimization techniques to mitigate the effects of soft errors in combinational logic
RR Rao, V Joshi, D Blaauw, D Sylvester
ACM Transactions on Design Automation of Electronic Systems (TODAES) 15 (1 …, 2009
122009
Closed-form modeling of layout-dependent mechanical stress
V Joshi, V Sukharev, A Torres, K Agarwal, D Sylvester, D Blaauw
Proceedings of the 47th Design Automation Conference, 673-678, 2010
102010
Mechanical stress aware optimization for leakage power reduction
V Joshi, B Cline, D Sylvester, D Blaauw, K Agarwal
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010
102010
Impact of inundative releases of Trichogramma chilonis Ishii in the control of maize stem borer, Chilo partellus (Swinhoe) in Himachal Pradesh.
US Rawat, AD Pawar, V Joshi
101994
Near-threshold circuit variability in 14nm FinFETs for ultra-low power applications
S Balasubramanian, N Pimparkar, M Kushare, V Mahajan, J Bansal, ...
2016 17th International Symposium on Quality Electronic Design (ISQED), 258-262, 2016
92016
STEEL: A technique for stress-enhanced standard cell library design
BT Cline, V Joshi, D Sylvester, D Blaauw
2008 IEEE/ACM International Conference on Computer-Aided Design, 691-697, 2008
82008
10T differential-signal SRAM design in a 14-nm FinFET technology for high-speed application
M Ichihashi, Y Woo, MAU Karim, V Joshi, D Burnett
2018 31st IEEE International System-on-Chip Conference (SOCC), 322-325, 2018
72018
Domain adaptation for an automated classification of deontic modalities in software engineering contracts
V Joshi, PR Anish, S Ghaisas
Proceedings of the 29th ACM joint meeting on European software engineering …, 2021
62021
Practical and Efficient Synthesis of 2-Thio-imidazole Derivative—ZY12201: A Potent TGR5 Agonist
VM Joshi, C Sojitra, S Sasane, M Shukla, R Chauhan, V Chaubey, S Jain, ...
Organic Process Research & Development 24 (8), 1508-1514, 2020
62020
Assessing intrinsic and extrinsic end-of-life risk using functional SRAM wafer level testing
YM Randriamihaja, W McMahon, S Balasubramanian, T Nigam, ...
2015 IEEE International Reliability Physics Symposium, 6A. 5.1-6A. 5.4, 2015
62015
SRAM read current variability and its dependence on transistor statistics
S Venugopalan, V Joshi, L Zamudio, M Goldbach, G Burbach, ...
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 1-4, 2013
62013
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