Kyomin Sohn
Kyomin Sohn
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A 0.7-fJ/bit/search 2.2-ns search time hybrid-type TCAM architecture
S Choi, K Sohn, HJ Yoo
IEEE Journal of solid-state circuits 40 (1), 254-260, 2005
A 1.2 V 30 nm 3.2 Gb/s/pin 4 Gb DDR4 SDRAM with dual-error detection and PVT-tolerant data-fetch scheme
K Sohn, T Na, I Song, Y Shim, W Bae, S Kang, D Lee, H Jung, S Hyun, ...
IEEE journal of solid-state circuits 48 (1), 168-177, 2012
A 1.2 V 20 nm 307 GB/s HBM DRAM with at-speed wafer-level IO test scheme and adaptive refresh considering temperature distribution
K Sohn, WJ Yun, R Oh, CS Oh, SY Seo, MS Park, DH Shin, WC Jung, ...
IEEE Journal of Solid-State Circuits 52 (1), 250-260, 2016
25.4 a 20nm 6gb function-in-memory dram, based on hbm2 with a 1.2 tflops programmable computing unit using bank-level parallelism, for machine learning applications
YC Kwon, SH Lee, J Lee, SH Kwon, JM Ryu, JP Son, O Seongil, HS Yu, ...
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 350-352, 2021
Hardware architecture and software stack for PIM based on commercial DRAM technology: Industrial product
S Lee, S Kang, J Lee, H Kim, E Lee, S Seo, H Yoon, S Lee, K Lim, H Shin, ...
2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021
Device and method for repairing memory cell and memory system including the device
KM Sohn, H Song, S Hwang, C Kim, S Dong-Hyun
US Patent 9,087,613, 2015
22.1 A 1.1 V 16GB 640GB/s HBM2E DRAM with a data-bus window-extension technique and a synergetic on-die ECC scheme
CS Oh, KC Chun, YY Byun, YK Kim, SY Kim, Y Ryu, J Park, S Kim, S Cha, ...
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 330-332, 2020
Internal power voltage generating circuit having a single drive transistor for stand-by and active modes
KM Sohn
US Patent 6,313,694, 2001
A low-power star-topology body area network controller for periodic data monitoring around and inside the human body
S Choi, SJ Song, K Sohn, H Kim, J Kim, J Yoo, HJ Yoo
2006 10th IEEE International Symposium on Wearable Computers, 139-140, 2006
Semiconductor memory device
KM Sohn, B Moon
US Patent 8,495,437, 2013
Semiconductor memory device having inverting circuit and controlling method there of
KM Sohn
US Patent 9,640,233, 2017
System for facilitating selection of investments
BA Hunter
US Patent 7,584,132, 2009
Semiconductor memory device
KM Sohn
US Patent 9,087,592, 2015
An autonomous sram with on-chip sensors in an 80-nm double stacked cell technology
K Sohn, HS Mo, YH Suh, HG Byun, HJ Yoo
IEEE journal of solid-state circuits 41 (4), 823-830, 2006
Near-memory processing in action: Accelerating personalized recommendation with AxDIMM
L Ke, X Zhang, J So, JG Lee, SH Kang, S Lee, S Han, YG Cho, JH Kim, ...
IEEE Micro 42 (1), 116-127, 2021
Device and method for repairing memory cell and memory system including the device
KM Sohn, H Song, S Hwang, C Kim, S Dong-Hyun
US Patent 9,831,003, 2017
A 100nm double-stacked 500MHz 72Mb separate-I/O synchronous SRAM with automatic cell-bias scheme and adaptive block redundancy
K Sohn, YH Suh, YJ Son, DS Yim, KY Kim, DG Bae, T Kang, H Lim, ...
2008 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2008
A 24.2-μ W Dual-Mode Human Body Communication Controller for Body Sensor Network
S Choi, SJ Song, K Sohn, H Kim, J Kim, N Cho, JH Woo, J Yoo, HJ Yoo
2006 Proceedings of the 32nd European Solid-State Circuits Conference, 227-230, 2006
Method of operating memory device and methods of writing and reading data in memory device
JP Son, YS Sohn, K Uk-Song, CW Park, J Choi, WI Bae, KM Sohn
US Patent 9,589,674, 2017
Semiconductor memory device with redundancy
KM Sohn, YH Suh
US Patent 6,618,299, 2003
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