Jiang Cao (曹江)
Jiang Cao (曹江)
ETH Zurich, Nanjing University of Science and Technology, Tyndall National Institute
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Dominant electron-phonon scattering mechanisms in -type PbTe from first principles
J Cao, JD Querales-Flores, AR Murphy, S Fahy, I Savić
Physical Review B 98 (20), 205202, 2018
Operation and Design of van der Waals Tunnel Transistors: A 3-D Quantum Transport Study
J Cao, D Logoteta, S Özkaya, B Biel, A Cresti, MG Pala, D Esseni
IEEE Transactions on Electron Devices 63 (10.1109/TED.2016.2605144), 4388-4394, 2016
Electron-phonon scattering and thermoelectric transport in -type PbTe from first principles
R D'Souza, J Cao, JD Querales-Flores, S Fahy, I Savić
Physical Review B 102 (11), 115204, 2020
A review of recent progress in thermoelectric materials through computational methods
JJ Gutiérrez Moreno, J Cao, M Fronzi, MHN Assadi
Materials for Renewable and Sustainable Energy 9 (3), 1-22, 2020
Temperature effects on the electronic band structure of PbTe from first principles
JD Querales-Flores, J Cao, S Fahy, I Savić
Physical Review Materials 3 (5), 055405, 2019
Quantum simulation of a heterojunction vertical tunnel FET based on 2D transition metal dichalcogenides
J Cao, A Cresti, D Esseni, M Pala
Solid-State Electronics 116, 1-7, 2016
Thermally induced band gap increase and high thermoelectric figure of merit of n-type PbTe
J Cao, JD Querales-Flores, S Fahy, I Savić
Materials Today Physics 12, 100172, 2020
Impact of inelastic phonon scattering in the OFF state of Tunnel-field-effect transistors
MG Pala, C Grillet, J Cao, D Logoteta, A Cresti, D Esseni
Journal of Computational Electronics 15 (4), 1240-1247, 2016
Thermoelectric performance of 2D materials: the band-convergence strategy and strong intervalley scatterings
Y Wu, B Hou, C Ma, J Cao, Y Chen, Z Lu, H Mei, H Shao, Y Xu, H Zhu, ...
Materials Horizons 8 (4), 1253-1263, 2021
A computational study of van der Waals tunnel transistors: Fundamental aspects and design challenges
J Cao, D Logoteta, S Özkaya, B Biel, A Cresti, M Pala, D Esseni
2015 IEEE International Electron Devices Meeting (IEDM), 12.5. 1-12.5. 4, 2015
Modulating tunneling width and energy window for high-on-current two-dimensional tunnel field-effect transistors
W Zhou, S Zhang, J Cao, Z Wu, Y Wang, Y Zhang, Z Yan, H Qu, H Zeng
Nano Energy 81, 105642, 2021
Cold-source paradigm for steep-slope transistors based on van der Waals heterojunctions
D Logoteta, J Cao, M Pala, P Dollfus, Y Lee, G Iannaccone
Physical Review Research 2 (4), 043286, 2020
Towards temperature-induced topological phase transition in SnTe: A first-principles study
JD Querales-Flores, P Aguado-Puente, Đ Dangić, J Cao, P Chudzinski, ...
Physical Review B 101 (23), 235206, 2020
Impact of momentum mismatch on 2D van der Waals tunnel field-effect transistors
J Cao, D Logoteta, MG Pala, A Cresti
Journal of Physics D: Applied Physics 51 (5), 055102, 2018
Extending channel scaling limit of p-MOSFETs through antimonene with heavy effective mass and high density of state
S Zhang, H Qu, J Cao, Y Wang, SA Yang, W Zhou, H Zeng
IEEE Transactions on Electron Devices 69 (2), 857-862, 2022
Strong electron–phonon coupling influences carrier transport and thermoelectric performances in group-IV/V elemental monolayers
Y Wu, B Hou, Y Chen, J Cao, H Shao, Y Zhang, C Ma, H Zhu, R Zhang, ...
npj Computational Materials 7 (1), 1-12, 2021
Dissipative transport and phonon scattering suppression via valley engineering in single-layer antimonene and arsenene field-effect transistors
J Cao, Y Wu, H Zhang, D Logoteta, S Zhang, M Pala
npj 2D Materials and Applications 5 (1), 1-8, 2021
Quantum simulation of a heterojunction inter-layer Tunnel FET based on 2-D gapped crystals
J Cao, M Pala, A Cresti, D Esseni
EUROSOI-ULIS 2015: 2015 Joint International EUROSOI Workshop and …, 2015
Electron-phonon coupling and electronic thermoelectric properties of -type PbTe driven near the soft-mode phase transition via lattice expansion
J Cao, Đ Dangić, JD Querales-Flores, S Fahy, I Savić
Physical Review B 104 (4), 045202, 2021
Simulation of 2D material-based tunnel field-effect transistors: planar vs. vertical architectures
J Cao, J Park, F Triozon, MG Pala, A Cresti
Nanoelectronic Devices 1 (Tunnel FETs), 2018
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