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Zizhen Jiang
Zizhen Jiang
Ph.D. Candidate, Electrical Engineering, Stanford University
Verified email at stanford.edu - Homepage
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Year
A Compact Model for Metal–Oxide Resistive Random Access Memory With Experiment Verification
Z Jiang, Y Wu, S Yu, L Yang, K Song, Z Karim, HSP Wong
IEEE Transactions on Electron Devices 63 (5), 1884-1892, 2016
1502016
Multi-level control of conductive nano-filament evolution in HfO 2 ReRAM by pulse-train operations
YN Liang Zhao, Hong-Yu Chen, Shih-Chieh Wu, Zizhen Jiang, Shimeng Yu, Tuo ...
Nanoscale 6 (11), 5698-5702, 2014
146*2014
Metal oxide-resistive memory using graphene-edge electrodes
S Lee, J Sohn, Z Jiang, HY Chen, HSP Wong
Nature communications 6, 8407, 2015
1242015
Verilog-A compact model for oxide-based resistive random access memory (RRAM)
Z Jiang, S Yu, Y Wu, JH Engel, X Guan, HSP Wong
2014 International Conference on Simulation of Semiconductor Processes and …, 2014
1092014
Variation-aware, reliability-emphasized design and optimization of RRAM using SPICE model
H Li, Z Jiang, P Huang, Y Wu, HY Chen, B Gao, XY Liu, JF Kang, ...
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2015
832015
3D vertical RRAM-scaling limit analysis and demonstration of 3D array operation
S Yu, HY Chen, Y Deng, B Gao, Z Jiang, J Kang, HSP Wong
2013 Symposium on VLSI Technology, T158-T159, 2013
582013
Design and optimization methodology for 3D RRAM arrays
Y Deng, HY Chen, B Gao, S Yu, SC Wu, L Zhao, B Chen, Z Jiang, X Liu, ...
2013 IEEE International Electron Devices Meeting, 25.7. 1-25.7. 4, 2013
542013
Ultrathin (∼2nm) HfOxas the fundamental resistive switching element: Thickness scaling limit, stack engineering and 3D integration
L Zhao, Z Jiang, HY Chen, J Sohn, K Okabe, B Magyari-Köpe, HSP Wong, ...
2014 IEEE International Electron Devices Meeting, 6.6. 1-6.6. 4, 2014
392014
1D Selection Device Using Carbon Nanotube FETs for High-Density Cross-Point Memory Arrays
C Ahn, Z Jiang, CS Lee, HY Chen, J Liang, LS Liyanage, HSP Wong
IEEE Transactions on Electron Devices 62 (7), 2197-2204, 2015
372015
Experimental study of plane electrode thickness scaling for 3D vertical resistive random access memory
HY Chen, S Yu, B Gao, R Liu, Z Jiang, Y Deng, B Chen, J Kang, ...
Nanotechnology 24 (46), 465201, 2013
332013
Atomically thin graphene plane electrode for 3D RRAM
J Sohn, S Lee, Z Jiang, HY Chen, HSP Wong
2014 IEEE International Electron Devices Meeting, 5.3. 1-5.3. 4, 2014
262014
Write disturb analyses on half-selected cells of cross-point RRAM arrays
H Li, HY Chen, Z Chen, B Chen, R Liu, G Qiu, P Huang, F Zhang, Z Jiang, ...
2014 IEEE International Reliability Physics Symposium, MY. 3.1-MY. 3.4, 2014
232014
Ultra-Low Power Ni/HfO 2/TiO x/TiN Resistive Random Access Memory With Sub-30-nA Reset Current
K Zhang, K Sun, F Wang, Y Han, Z Jiang, J Zhao, B Wang, H Zhang, ...
IEEE Electron Device Letters 36 (10), 1018-1020, 2015
212015
Design guidelines for 3D RRAM cross-point architecture
S Yu, Y Deng, B Gao, P Huang, B Chen, X Liu, J Kang, HY Chen, Z Jiang, ...
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 421-424, 2014
192014
3-D resistive memory arrays: From intrinsic switching behaviors to optimization guidelines
H Li, B Gao, HYH Chen, Z Chen, P Huang, R Liu, L Zhao, ZJ Jiang, L Liu, ...
IEEE Transactions on Electron Devices 62 (10), 3160-3167, 2015
182015
First demonstration of RRAM patterned by block copolymer self-assembly
Y Wu, H Yi, Z Zhang, Z Jiang, J Sohn, S Wong, HSP Wong
2013 IEEE International Electron Devices Meeting, 20.8. 1-20.8. 4, 2013
182013
Next-Generation Ultrahigh-Density 3-D Vertical Resistive Switching Memory (VRSM)—Part II: Design Guidelines for Device, Array, and Architecture
Z Jiang, S Qin, H Li, S Fujii, D Lee, S Wong, HSP Wong
IEEE Transactions on Electron Devices 66 (12), 5147-5154, 2019
172019
Modeling and design optimization of ReRAM
JF Kang, HT Li, P Huang, Z Chen, B Gao, XY Liu, ZZ Jiang, HSP Wong
The 20th Asia and South Pacific Design Automation Conference, 576-581, 2015
162015
Next-generation ultrahigh-density 3-D vertical resistive switching memory (VRSM)—Part I: Accurate and computationally efficient modeling
S Qin, Z Jiang, H Li, S Fujii, D Lee, SS Wong, HSP Wong
IEEE Transactions on Electron Devices 66 (12), 5139-5146, 2019
152019
Microsecond transient thermal behavior of HfOx-based resistive random access memory using a micro thermal stage (MTS)
Z Jiang, Z Wang, X Zheng, S Fong, S Qin, HY Chen, C Ahn, J Cao, Y Nishi, ...
2016 IEEE International Electron Devices Meeting (IEDM), 21.3. 1-21.3. 4, 2016
152016
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