| Graph-based transistor network generation method for supergate design VN Possani, V Callegaro, AI Reis, RP Ribas, F de Souza Marques, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (2), 692-705, 2015 | 38 | 2015 |
| Standby power consumption estimation by interacting leakage current mechanisms in nanoscaled CMOS digital circuits PF Butzen, LS da Rosa Jr, EJD Chiappetta Filho, AI Reis, RP Ribas Microelectronics Journal 41 (4), 247-255, 2010 | 30 | 2010 |
| Switch level optimization of digital CMOS gate networks LS da Rosa, FR Schneider, RP Ribas, AI Reis 2009 10th International Symposium on Quality Electronic Design, 324-329, 2009 | 30 | 2009 |
| Fast disjoint transistor networks from BDDs LS da Rosa Junior, FS Marques, TMG Cardoso, RP Ribas, ... Proceedings of the 19th annual symposium on Integrated circuits and systems …, 2006 | 25 | 2006 |
| Logic synthesis meets machine learning: Trading exactness for generalization S Rai, WL Neto, Y Miyasaka, X Zhang, M Yu, Q Yi, M Fujita, GB Manske, ... 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021 | 20 | 2021 |
| A comparative study of CMOS gates with minimum transistor stacks LS da Rosa, AI Reis, RP Ribas, FS Marques, FR Schneider Proceedings of the 20th annual conference on Integrated circuits and systems …, 2007 | 19 | 2007 |
| SwitchCraft: a framework for transistor network design V Callegaro, FS Marques, CE Klock, LS da Rosa Jr, RP Ribas, AI Reis Proceedings of the 23rd symposium on Integrated circuits and system design …, 2010 | 17 | 2010 |
| Optimizing transistor networks using a graph-based technique VN Possani, RS de Souza, JS Domingues, LV Agostini, FS Marques, ... Analog Integrated Circuits and Signal Processing 73, 841-850, 2012 | 15 | 2012 |
| A Media Processing Implementation Using Libvlc for the Ginga Middleware TH Trojahn, JL Gonçalves, JCB Mattos, LSDR Junior, LV Agostini 2010 5th International Conference on Future Information Technology, 1-6, 2010 | 10 | 2010 |
| NSP kernel finder-A methodology to find and to build non-series-parallel transistor arrangements VN Possani, FS Marques, LS da Rosa Junior, V Callegaro, AI Reis, ... 2012 25th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2012 | 6 | 2012 |
| Evaluating geometric aspects of non-series-parallel cells MS Cardoso, LS da Rosa Jr, F de Souza Marques Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 1-6, 2015 | 5 | 2015 |
| Exploring independent gates in FinFET-based transistor network generation VN Possani, AI Reis, RP Ribas, FS Marques, LS da Rosa Junior Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 1-6, 2014 | 5 | 2014 |
| High throughput 4x4 and 8x8 SATD similarity criteria architectures for video coding applications JS Dominges Jr, VN Possani, DS Silveira, LS da Rosa Jr, LV Agostini 2011 VII Designer Forum (DF), 115, 2011 | 4 | 2011 |
| Fast Boolean factoring with multi-objective goals AI Reis, A Rasmussen, LR Junior, RP Ribas International Workshop on Logic & Synthesis-IWLS 2009, 2009 | 4 | 2009 |
| Speed-up of ASICs derived from FPGAs by transistor network synthesis including reordering TMG Cardoso, F de Souza Marques, RP Ribas, AI Reis, LS da Rosa 9th International Symposium on Quality Electronic Design (isqed 2008), 47-52, 2008 | 4 | 2008 |
| Logicflow: Uma ferramenta para o auxílio de ensino-aprendizagem de circuitos digitais LQ Jurgina, R Zanandrea, LSR Júnior, F de Souza Marques Anais do XXXI Simpósio Brasileiro de Informática na Educação, 322-331, 2020 | 3 | 2020 |
| Transistor-level optimization of CMOS complex gates VN Possani, FS Marques, LS da Rosa Junior, V Callegaro, AI Reis, ... 2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS), 1-4, 2013 | 3 | 2013 |
| Evaluating two implementations of the component responsible for decoding video and audio in the Brazilian digital TV middleware TH Trojahn, JL Gonçalves, JCB Mattos, LV Agostini, LS Da Rosa Multimedia Tools and Applications 57, 373-392, 2012 | 3 | 2012 |
| A comparative analysis of media processing component implementations for the Brazilian digital TV middleware TH Trojahn, JL Gonçalves, JC Balzano de Mattos, LV Agostini, ... International Journal of Information Technology, Communications and …, 2011 | 3 | 2011 |
| Transistor networks design using a graph-based approach VN Possani, EF Timm, LV Agostini, LS Da Rosa Junior 10th Microelectronics Students Forum, 2010 | 3 | 2010 |
Andre ReisInstitute of Informatics - UFRGSVerified email at inf.ufrgs.br
